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Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
EDACafe Editorial
![Roberto Frazzoli](https://www10.edacafe.com/blogs/editorial/wp-content/blogs.dir/158/files/2023/01/Roberto-150x150.jpeg)
EDA updates; new AI approaches; hi-res thermal mapping; dumb LLMs July 25, 2024
Memory-based neural networks and the use of “sparse AI” at the edge are two new AI approaches included in this week’s news roundup. Reasoning failures from LLMs are discussed in our Further Reading section. But first, some EDA updates. EDA …
Memory-based neural networks and the use of “sparse AI” at the edge are two new AI approaches included in this week’s news roundup. Reasoning failures from LLMs are discussed in our Further Reading section. But first, some EDA updates. EDA …
Bridging the Frontier
![Paul Cohen](https://www10.edacafe.com/blogs/edacconsortium/wp-content/blogs.dir/143/files/2023/02/Paul-Cohen.jpg)
Strong Q1 2024 Revenue Growth from Electronic System Design, Reports EDMD July 16, 2024
Strong Q1 2024 Revenue Growth from Electronic System Design, Reports EDMD Hats off once again to our Electronic System Design (ESD) industry for another quarter of -solid revenue growth. The latest Electronic Design Market Data (EDMD) report …
Strong Q1 2024 Revenue Growth from Electronic System Design, Reports EDMD Hats off once again to our Electronic System Design (ESD) industry for another quarter of -solid revenue growth. The latest Electronic Design Market Data (EDMD) report …
Siemens EDA
![Andy Meier](https://www10.edacafe.com/blogs/siemens/wp-content/blogs.dir/165/files/2024/07/andy-150x150.jpg)
The Veloce Ecosystem: Applications targeted to solving end user challenges July 15, 2024
In the rapidly evolving semiconductor and electronic design world, hardware-assisted verification (HAV) has become an indispensable part of the design process. The use of hardware platforms like emulators and FPGA-based prototyping systems to …
In the rapidly evolving semiconductor and electronic design world, hardware-assisted verification (HAV) has become an indispensable part of the design process. The use of hardware platforms like emulators and FPGA-based prototyping systems to …
The Dominion of Design
![Sanjay Gangal](https://www10.edacafe.com/blogs/grahambell/wp-content/blogs.dir/2/files/2023/11/Sanjay-Gangal-1.jpg)
Silicon Creations at the Forefront of IP Solutions: Insights from Rick Ader, VP of Sales July 1, 2024
In the bustling atmosphere of the 61st Design Automation Conference in San Francisco, I had the pleasure of sitting down with Rick Ader, Vice President of Sales at Silicon Creations, to delve into the latest advancements and offerings from this …
In the bustling atmosphere of the 61st Design Automation Conference in San Francisco, I had the pleasure of sitting down with Rick Ader, Vice President of Sales at Silicon Creations, to delve into the latest advancements and offerings from this …
EDACafe Editorial
![Sanjay Gangal](https://www10.edacafe.com/blogs/marketingeda/wp-content/blogs.dir/43/files/2023/01/Sanjay.jpg)
Intel Xeon Processors Accelerate GenAI Workloads with Aible June 27, 2024
In a significant advancement for the enterprise AI landscape, Intel and Aible have joined forces to offer groundbreaking solutions for running advanced generative AI (GenAI) and retrieval-augmented generation (RAG) use cases. This collaboration, …
In a significant advancement for the enterprise AI landscape, Intel and Aible have joined forces to offer groundbreaking solutions for running advanced generative AI (GenAI) and retrieval-augmented generation (RAG) use cases. This collaboration, …
EDACafe Editorial
![Sanjay Gangal](https://www10.edacafe.com/blogs/whatwouldjoedo/wp-content/blogs.dir/68/files/2023/11/Sanjay-Gangal.jpg)
Innovating PCB Design: An Interview with Duncan Haldane, CEO of JITX June 25, 2024
In the ever-evolving world of electronic design automation (EDA), JITX is making waves by revolutionizing how printed circuit boards (PCBs) are designed. I had the opportunity to sit down with Duncan Haldane, CEO and co-founder of JITX, at the 61st …
In the ever-evolving world of electronic design automation (EDA), JITX is making waves by revolutionizing how printed circuit boards (PCBs) are designed. I had the opportunity to sit down with Duncan Haldane, CEO and co-founder of JITX, at the 61st …
Industry Predictions
![Sanjay Gangal](https://www10.edacafe.com/blogs/noteda/wp-content/blogs.dir/93/files/2023/01/Sanjay.jpg)
A New Era for Electric Vehicles: Silicon Mobility and Intel Lead the Charge June 19, 2024
The electric vehicle (EV) market is undergoing a revolution, driven by cutting-edge technologies that promise to reshape the automotive landscape. Two recent announcements from Silicon Mobility and Intel highlight the significant strides being made …
The electric vehicle (EV) market is undergoing a revolution, driven by cutting-edge technologies that promise to reshape the automotive landscape. Two recent announcements from Silicon Mobility and Intel highlight the significant strides being made …
Guest Blogger
![Sanjay Gangal](https://www10.edacafe.com/blogs/guest/wp-content/blogs.dir/33/files/2023/01/Sanjay2.jpg)
Streamline 3D IC verification with a shift-left strategy June 13, 2024
Unlike traditional integrated circuit (IC) designs, multi-dimensional 2.5D and 3D ICs are composed of multiple individual chiplets, each built to a separate process node best suited for its specific purpose. There are many different design options …
Unlike traditional integrated circuit (IC) designs, multi-dimensional 2.5D and 3D ICs are composed of multiple individual chiplets, each built to a separate process node best suited for its specific purpose. There are many different design options …
Agnisys Automation Review
![Anupam Bakshi](https://www10.edacafe.com/blogs/agnisys/wp-content/blogs.dir/156/files/2024/07/anupam-150x150.png)
The Role of the Portable Stimulus Standard in VLSI Development April 23, 2024
Semiconductor chip and intellectual property (IP) development is in a constant state of change. For architects, paper specifications have largely been replaced by abstract, executable models. Designers migrated from polygons to gates to register …
Semiconductor chip and intellectual property (IP) development is in a constant state of change. For architects, paper specifications have largely been replaced by abstract, executable models. Designers migrated from polygons to gates to register …
Arteris IP Blog
![arterisip](https://www10.edacafe.com/blogs/arterisip/wp-content/blogs.dir/164/files/2023/07/Arteris-Logo-JPG-150x150.jpg)
Managing SoC Hardware/Software Interface With CSRCompiler October 25, 2023
Author: Rich Weber Richard Weber is a fellow at Arteris following the acquisition of Semifore, the company he founded and managed for 17 years as CEO. He has served as a committee member for the IEEE Standards Association and the Accellera …
Author: Rich Weber Richard Weber is a fellow at Arteris following the acquisition of Semifore, the company he founded and managed for 17 years as CEO. He has served as a committee member for the IEEE Standards Association and the Accellera …
IC Insights
![IC Insights](https://www10.edacafe.com/blogs/icinsights/wp-content/blogs.dir/155/files/2023/01/ICinsightsLogo.jpg)
2023 Semi Capex Forecast Sees Largest Decline Since 2008-09 November 29, 2022
A weak memory market and U.S. sanctions on China semiconductor producers are two driving factors behind the expected -19% drop in semiconductor capital spending in 2023. The McClean Report celebrates its 25th anniversary and now you can enjoy it …
A weak memory market and U.S. sanctions on China semiconductor producers are two driving factors behind the expected -19% drop in semiconductor capital spending in 2023. The McClean Report celebrates its 25th anniversary and now you can enjoy it …
ASIC with Ankit
![Ankit Gopani](https://www10.edacafe.com/blogs/asicwithankit/wp-content/blogs.dir/83/files/2023/11/Ankit-Gopani-140x150.jpg)
System Verilog “ref” is a nice reference instead of “value” December 30, 2021
Pass by reference is an interesting and very useful feature in system verilog. Very useful and importatn topic to understand and you might hit this as interview question in your next verification interview. This one is one of the very commonly asked …
Pass by reference is an interesting and very useful feature in system verilog. Very useful and importatn topic to understand and you might hit this as interview question in your next verification interview. This one is one of the very commonly asked …
Aldec Design and Verification
![Farhad Fallahlalehzari](https://www10.edacafe.com/blogs/aldec/wp-content/blogs.dir/95/files/2023/11/Farhad-Fallahlalehzari-150x150.jpg)
How does the Mars Perseverance rover benefit from FPGAs as the main processing units? April 6, 2021
Tasked with finding life in the form of microorganisms, the rover Perseverance landed on Mars at about 04:00 EST on February 18, 2021. The rover has multiple sensors and cameras to collect as much data as possible and, due to the volume of live data …
Tasked with finding life in the form of microorganisms, the rover Perseverance landed on Mars at about 04:00 EST on February 18, 2021. The rover has multiple sensors and cameras to collect as much data as possible and, due to the volume of live data …
Embedded Software
![Colin Walls](https://www10.edacafe.com/blogs/embeddedsoftware/wp-content/blogs.dir/104/files/2023/11/Colin-Walls.gif)
Take a break – the break statement in March 16, 2021
It is a given that structured programming - in one form or another - is a Good Thing. For years, the spaghetti of GOTOs that arose in earlier programming languages has been abhorred by all right-thinking programmers. There are good reasons for this …
It is a given that structured programming - in one form or another - is a Good Thing. For years, the spaghetti of GOTOs that arose in earlier programming languages has been abhorred by all right-thinking programmers. There are good reasons for this …
Silvaco Nanometer Newsbyte
![Graham Bell](https://www10.edacafe.com/blogs/silvaco/wp-content/blogs.dir/157/files/2023/11/Graham-Bell.png)
Webinar: Accelerating Wireless IOT SoCs with Silvaco AMBA® Subsystem IP January 28, 2021
In this webinar you will learn how Rafael Microelectronics has deployed Silvaco’s AMBA subsystem in their latest IOT design. Rafael Microelectronics develops high frequency broadband RF IC designs and narrow band IOT IP and devices. Rafael …
In this webinar you will learn how Rafael Microelectronics has deployed Silvaco’s AMBA subsystem in their latest IOT design. Rafael Microelectronics develops high frequency broadband RF IC designs and narrow band IOT IP and devices. Rafael …
Global Business in EDA
![Modesto (Mo) Casas](https://www10.edacafe.com/blogs/mo-casas/wp-content/blogs.dir/49/files/2023/11/Modesto-Mo-Casas-150x150.png)
Focus a Global Reseller Channel on Your Product December 1, 2020
You can turn an indirect channel into a remarkably productive sales team. Make your products easier to sell to become a high sales priority for your channel. When I first engage with existing international sales channels, I find most …
You can turn an indirect channel into a remarkably productive sales team. Make your products easier to sell to become a high sales priority for your channel. When I first engage with existing international sales channels, I find most …
IP Showcase
![Jacek Hanke](https://www10.edacafe.com/blogs/ipshowcase/wp-content/blogs.dir/60/files/2023/11/Jacek-Hanke-150x150.gif)
What the FAQ with obsolete & EOL parts? February 11, 2020
There’s an old saying that we like the things we know. The same goes with CPUs and other electronics. We use some specific ASICs or FPGAs for years, cause they just are there. And what to do if they become obsolete and manufacturer decided not to …
There’s an old saying that we like the things we know. The same goes with CPUs and other electronics. We use some specific ASICs or FPGAs for years, cause they just are there. And what to do if they become obsolete and manufacturer decided not to …
The Breker Trekker
![Adnan Hamid, CEO of Breker](https://www10.edacafe.com/blogs/thebrekertrekker/wp-content/blogs.dir/90/files/2023/11/Adnan-Hamid-CEO-of-Breker-150x150.jpg)
PSS and RISC-V – A Match Made In Verification November 14, 2019
The industry is excited about RISC-V, and rightly so. It is enabling companies to take back control of their software execution environment without having to assume the huge responsibilities that come along with processor development and support of …
The industry is excited about RISC-V, and rightly so. It is enabling companies to take back control of their software execution environment without having to assume the huge responsibilities that come along with processor development and support of …
AWR Insights
![David Vye](https://www10.edacafe.com/blogs/awr/wp-content/blogs.dir/42/files/2023/11/David-Vye-150x150.jpg)
A Conversation With Andrew Zai of IEEE September 25, 2019
Recently I participated in an online interview with Andrew Zai, social media chair for the 2019 IEEE International Symposium on Phased Array Systems and Technology, to discuss the history of phased arrays/radar and the role of simulation software. …
Recently I participated in an online interview with Andrew Zai, social media chair for the 2019 IEEE International Symposium on Phased Array Systems and Technology, to discuss the history of phased arrays/radar and the role of simulation software. …
Hardware Emulation Journal
![Jean-Marie Brunet](https://www10.edacafe.com/blogs/nvc/wp-content/blogs.dir/138/files/2023/11/Jean-Marie-Brunet-avatar.jpeg)
Post-silicon SW Debug, AI/ML and SSD Design Verification all at Mentor U2U 2019 May 22, 2019
Mentor U2U in Santa Clara was a particularly interesting event for the emulation division at Mentor. This year, our customers from Marvell, SK hynix, Wave Computing, Broadcom, and AMD talked about their challenges and successes – bringing to other …
Mentor U2U in Santa Clara was a particularly interesting event for the emulation division at Mentor. This year, our customers from Marvell, SK hynix, Wave Computing, Broadcom, and AMD talked about their challenges and successes – bringing to other …
Video Roundup
![Sanjay Gangal](https://www10.edacafe.com/blogs/videoroundup/wp-content/blogs.dir/64/files/2023/11/Sanjay-Video-Roundup-150x150.jpg)
Interview with Simon Butler, CEO of Methodics at DVCon 2019 March 27, 2019
Sanjay Gangal interviewed Simon Butler, CEO of Methodics. at the 2019 DVCon. SG: Simon, …
Sanjay Gangal interviewed Simon Butler, CEO of Methodics. at the 2019 DVCon. SG: Simon, …
My DAC Moments
![Derek Magill](https://www10.edacafe.com/blogs/mydacmoments/wp-content/blogs.dir/86/files/2023/11/Derek-Magill-150x150.gif)
Design Infrastructure Alley at DAC 2019 February 4, 2019
2018 marked the first year of the Design Infrastructure Alley (DIA) at DAC. It was the first time that DAC devoted floor-space to discussing the unique IT needs of the semiconductor industry.
2018 marked the first year of the Design Infrastructure Alley (DIA) at DAC. It was the first time that DAC devoted floor-space to discussing the unique IT needs of the semiconductor industry.
Decoding Formal
![Rob van Blommestein](https://www10.edacafe.com/blogs/oski/wp-content/blogs.dir/96/files/2023/11/Rob-van-Blommestein-150x150.jpg)
The ABCs of Winning at the 2017 Hardware Model Checking Competition March 7, 2018
Every year for the last nine years teams of researchers and software developers have come together to compete in the Hardware Model Checking Competition (HWMCC). This contest pits some of the brightest minds in design and verification against each …
Every year for the last nine years teams of researchers and software developers have come together to compete in the Hardware Model Checking Competition (HWMCC). This contest pits some of the brightest minds in design and verification against each …
Custom Layout Insights
![Graham Etchells, Director of Product Marketing at Synopsys](https://www10.edacafe.com/blogs/customlayoutinsights/wp-content/blogs.dir/150/files/2023/11/Graham-Etchells-Director-of-Product-Marketing-at-Synopsys.jpg)
Trouble Ahead, Trouble Behind January 12, 2017
Happy New Year! There’s no doubt that FinFET technologies have been very appealing. With FinFETs being up to 37% faster while using less than half the dynamic power than planar transistors, they have been a ‘no brainer’ to adopt and the …
Happy New Year! There’s no doubt that FinFET technologies have been very appealing. With FinFETs being up to 37% faster while using less than half the dynamic power than planar transistors, they have been a ‘no brainer’ to adopt and the …
What's PR got to do with it?
![Ed Lee](https://www10.edacafe.com/blogs/ed-lee/wp-content/blogs.dir/22/files/2023/11/Ed-Lee-141x150.jpg)
What is in-situ de-embedding? January 14, 2016
As a follow up to Chris Scholz’s predictions on 2016 signal integrity trends, we checked in with in-situ de-embedding inventor Dr. Ching-Chao Huang, who gives us a more detailed look at how engineers will need to handle signal integrity …
As a follow up to Chris Scholz’s predictions on 2016 signal integrity trends, we checked in with in-situ de-embedding inventor Dr. Ching-Chao Huang, who gives us a more detailed look at how engineers will need to handle signal integrity …