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Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.

 Siemens EDA  by Jean-Marie Brunet
Jean-Marie Brunet
Facing a New Age of IC Design Challenges Part 1 May 16, 2024
In an industry accustomed to incremental change, Veloce CS is a departure because it is a complete three-in-one system, a development that Ron Wilson, a longtime technology editor, explores with Brunet in this 2-part blog. Wilson: How do you …

 The Dominion of Design  by Sanjay Gangal
Sanjay Gangal
Unleashing New Horizons: Gemini Era Ushers in Revolutionary AI Developments at Google I/O May 15, 2024
At this year's Google I/O, the electrifying atmosphere was palpable as Google unveiled its latest triumph in artificial intelligence—the Gemini project. This year's keynote, delivered by Sundar Pichai amidst rousing applause, emphasized Google's …

 EDACafe Editorial  by Roberto Frazzoli
Roberto Frazzoli
Synopsys to sell Software Integrity Group; Micron to get CHIPS Act funding; 3D solution for RFSOI; recyclable PCBs May 9, 2024
An interesting side effect of the so-called “chip war” is that, now, even large news agencies are sometimes delving quite deep into technology topics. News agency Reuters has recently assigned reverse engineering experts to tear down a Huawei …

 Bridging the Frontier  by Bob Smith, Executive Director
Bob Smith, Executive Director
Ansys’ John Lee on Cultivating Trust within his Team May 9, 2024
Note: Bob Smith's interview below with John Lee of Ansys originally appeared March 4, 2024 on the SEMI website blog. Cultivating trust and keeping his team agile and innovative as they engage with technology partners and customers is a core focus …

 Agnisys Automation Review  by Anupam Bakshi
Anupam Bakshi
The Role of the Portable Stimulus Standard in VLSI Development April 23, 2024
Semiconductor chip and intellectual property (IP) development is in a constant state of change. For architects, paper specifications have largely been replaced by abstract, executable models. Designers migrated from polygons to gates to register …

 EDACafe Editorial  by Sanjay Gangal
Sanjay Gangal
Navigating the Future: CadenceLive Reveals a Transformative Vision in Semiconductor and System Design April 18, 2024
At this year's CadenceLive event, an assembly of technological vision and collaboration unfolded as Anirudh Devgan, CEO of Cadence Design Systems, delivered a compelling keynote address that painted a picture of a rapidly evolving technological …

 EDACafe Editorial  by Sanjay Gangal
Sanjay Gangal
Homegrown AI Tools at Intel Shorten Design Cycles from Weeks to Hours April 16, 2024
For decades, determining exactly where to place heat-sensitive sensors on Intel’s client processors required equal parts science and art. Circuit designers would be guided by historical data when deciding where to place thermal sensors on the …

 Industry Predictions  by Sanjay Gangal
Sanjay Gangal
Intel Sets New Paradigms in Enterprise AI with Launch of Gaudi 3 at Intel Vision 2024 April 11, 2024
At Intel Vision 2024, under the leadership of CEO Pat Gelsinger, Intel demonstrated its strong commitment to transforming enterprise artificial intelligence (AI) with groundbreaking announcements and product launches. Highlighted by the unveiling of …

 Guest Blogger  by David Abercrombie
David Abercrombie
Winning doesn’t happen at the finish line, even in IC verification February 19, 2024
By David Abercrombie In motor car racing, many people think the win happens on the track, with lightning-fast pit stops ensuring the fastest car takes the …

 Arteris IP Blog  by arterisip
Managing SoC Hardware/Software Interface With CSRCompiler October 25, 2023
Author: Rich Weber Richard Weber is a fellow at Arteris following the acquisition of Semifore, the company he founded and managed for 17 years as CEO. He has served as a committee member for the IEEE Standards Association and the Accellera …

 IC Insights  by IC Insights
IC Insights
2023 Semi Capex Forecast Sees Largest Decline Since 2008-09 November 29, 2022
A weak memory market and U.S. sanctions on China semiconductor producers are two driving factors behind the expected -19% drop in semiconductor capital spending in 2023. The McClean Report celebrates its 25th anniversary and now you can enjoy it …

 ASIC with Ankit  by Ankit Gopani
Ankit Gopani
System Verilog “ref” is a nice reference instead of “value” December 30, 2021
Pass by reference is an interesting and very useful feature in system verilog. Very useful and importatn topic to understand and you might hit this as interview question in your next verification interview. This one is one of the very commonly asked …

 Aldec Design and Verification  by Farhad Fallahlalehzari
Farhad Fallahlalehzari
How does the Mars Perseverance rover benefit from FPGAs as the main processing units? April 6, 2021
Tasked with finding life in the form of microorganisms, the rover Perseverance landed on Mars at about 04:00 EST on February 18, 2021. The rover has multiple sensors and cameras to collect as much data as possible and, due to the volume of live data …

 Embedded Software  by Colin Walls
Colin Walls
Take a break – the break statement in March 16, 2021
It is a given that structured programming - in one form or another - is a Good Thing. For years, the spaghetti of GOTOs that arose in earlier programming languages has been abhorred by all right-thinking programmers. There are good reasons for this …

 Silvaco Nanometer Newsbyte  by Graham Bell
Graham Bell
Webinar: Accelerating Wireless IOT SoCs with Silvaco AMBA® Subsystem IP January 28, 2021
In this webinar you will learn how Rafael Microelectronics has deployed Silvaco’s AMBA subsystem in their latest IOT design. Rafael Microelectronics develops high frequency broadband RF IC designs and narrow band IOT IP and devices. Rafael …

 Global Business in EDA  by Modesto (Mo) Casas
Modesto (Mo) Casas
Focus a Global Reseller Channel on Your Product December 1, 2020
You can turn an indirect channel into a remarkably productive sales team. Make your products easier to sell to become a high sales priority for your channel.   When I first engage with existing international sales channels, I find most …

 IP Showcase  by Jacek Hanke
Jacek Hanke
What the FAQ with obsolete & EOL parts? February 11, 2020
There’s an old saying that we like the things we know. The same goes with CPUs and other electronics. We use some specific ASICs or FPGAs for years, cause they just are there. And what to do if they become obsolete and manufacturer decided not to …

 The Breker Trekker  by Adnan Hamid, CEO of Breker
Adnan Hamid, CEO of Breker
PSS and RISC-V – A Match Made In Verification November 14, 2019
The industry is excited about RISC-V, and rightly so. It is enabling companies to take back control of their software execution environment without having to assume the huge responsibilities that come along with processor development and support of …

 AWR Insights  by David Vye
David Vye
A Conversation With Andrew Zai of IEEE September 25, 2019
Recently I participated in an online interview with Andrew Zai, social media chair for the 2019 IEEE International Symposium on Phased Array Systems and Technology, to discuss the history of phased arrays/radar and the role of simulation software. …

 Hardware Emulation Journal  by Jean-Marie Brunet
Jean-Marie Brunet
Post-silicon SW Debug, AI/ML and SSD Design Verification all at Mentor U2U 2019 May 22, 2019
Mentor U2U in Santa Clara was a particularly interesting event for the emulation division at Mentor. This year, our customers from Marvell, SK hynix, Wave Computing, Broadcom, and AMD talked about their challenges and successes – bringing to other …

 Video Roundup  by Sanjay Gangal
Sanjay Gangal
Interview with Simon Butler, CEO of Methodics at DVCon 2019 March 27, 2019
Sanjay Gangal interviewed Simon Butler, CEO of Methodics. at the 2019 DVCon. SG: Simon, …

 My DAC Moments  by Derek Magill
Derek Magill
Design Infrastructure Alley at DAC 2019 February 4, 2019
2018 marked the first year of the Design Infrastructure Alley (DIA) at DAC.  It was the first time that DAC devoted floor-space to discussing the unique IT needs of the semiconductor industry.

 Decoding Formal  by Rob van Blommestein
Rob van Blommestein
The ABCs of Winning at the 2017 Hardware Model Checking Competition March 7, 2018
Every year for the last nine years teams of researchers and software developers have come together to compete in the Hardware Model Checking Competition (HWMCC). This contest pits some of the brightest minds in design and verification against each …

 Custom Layout Insights  by Graham Etchells, Director of Product Marketing at Synopsys
Graham Etchells, Director of Product Marketing at Synopsys
Trouble Ahead, Trouble Behind January 12, 2017
Happy New Year! There’s no doubt that FinFET technologies have been very appealing. With FinFETs being up to 37% faster while using less than half the dynamic power than planar transistors, they have been a ‘no brainer’ to adopt and the …

 What's PR got to do with it?  by Ed Lee
Ed Lee
What is in-situ de-embedding? January 14, 2016
As a follow up to Chris Scholz’s predictions on 2016 signal integrity trends, we checked in with in-situ de-embedding inventor Dr. Ching-Chao Huang, who gives us a more detailed look at how engineers will need to handle signal integrity …

Featured Video
Latest Blog Posts
Jean-Marie BrunetSiemens EDA
by Jean-Marie Brunet
Facing a New Age of IC Design Challenges Part 1
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Ansys’ John Lee on Cultivating Trust within his Team
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
The Role of the Portable Stimulus Standard in VLSI Development
Hardware Engineer for PTEC Solutions at Fremont, California
Technical Staff Engineer - Hardware (FPGA) for Microchip at San Jose, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Mechanical Design Engineer for Apple Inc at Cupertino, California
Senior SOC Design Engineer for Nvidia at Santa Clara, California
Hardware Development Engineer - (PCB) for Cisco Systems Inc at Austin, Texas
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