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Archive for December 6th, 2011

Open-Silicon Fall 2011 Update by Dr. Naveed Sherwani, Co-Founder, President & CEO

Tuesday, December 6th, 2011

 

 

 

 

 

 

 

 

As the last quarter unfolded, it became clear that the semiconductor market continues to lag amid the global economic and political concerns around the world. The events continue to unfold and despite progress on various fronts, lingering concerns still inject caution into the overall outlook. To navigate this turbulence, Open-Silicon has maintained a focused on its core beliefs: customer-centric solutions, operational excellence and customer satisfaction. With those in mind let’s review recent developments at the company.

First of all, throughout 2011 our customers increasingly asked us for ARM®-based solutions, in both mobile and non-traditional ARM markets. In response, this summer we greatly expanded our relationship with ARM, becoming one of a few companies worldwide offering ARM-based ASIC design services backed with a comprehensive multi-year ARM licensing agreement. And we did not stop there – to further integrate ARM processors, graphics and system IP into a complete solutions package, we created the ARM Center of Excellence. Open-Silicon’s ARM Center of Excellence builds upon our foundation of ASIC design and manufacturing by adding SoC architecture and transaction-level modeling, system prototyping, ARM-based software, and board design services to complete the solutions offering.

Another recent trend has been growing demand for our Interlaken Controller IP, which is helping core networking infrastructure devices achieve the next level of performance. However, increased performance has highlighted the challenge in another area: memory bandwidth. Our customers increasingly also need solutions to address memory interface bandwidth, especially in packet-processing and high-performance computing systems. In response, this October Open-Silicon joined DRAM leaders Micron and Samsung in the new Hybrid Memory Cube (HMC) Consortium. As a founder and developer member of the Consortium, Open-Silicon will help ASIC and ASSP developers access the revolutionary HMC technology through a combination of industry standards development, HMC interface IP, and HMC-specific design services.

HMC, leveraging Through-Silicon Via (TSV) technology and state-of-the-art DRAM design, promises to bring unparalleled bandwidth (over 15X better than DDR3), footprint savings (90% less space), and major power savings compared to DDR-based solutions. I believe HMC will enable new solutions in networking, cloud computing and high-bandwidth applications, which are currently not possible due to constraints in processor-memory interfaces.

In the coming quarter, Open-Silicon plans to expand its team and add capabilities to go deeper into system-level solutions and hardware-software design. In addition to our conventional capabilities with ASICs, we strongly believe that with our focus on system-level solutions, ARM-based SoCs and differentiated memory solutions, we will continue bringing significant value to our customers.

 

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