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Archive for June, 2012

Atrenta acquires NextOp – Could this be the start of something BIG?

Wednesday, June 20th, 2012

 

Gary Smith’s statement about the Atrenta acquisition of NextOp has been bandied about this morning in the news….“This could be the start of something big, and NextOp was an excellent place to start.”

See today’s news and analysis about Atrenta’s acquisition of assertion synthesis vendor NextOp plus an interview with Atrenta and NextOp execs in the following online publications:

EDA Café Blog: What Would Joe Do?

EDA Express

EE Daily News

EE Times News & Analysis

EE Times: EDA DesignLine

Gabe on EDA

SemiWiki

System-Level Design

Tech Design Forums

 

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Lee PR does work for Atrenta

Atrenta buys NextOp

Wednesday, June 20th, 2012

 

 

 

 

Atrenta Accelerates Growth in Front End Design with Acquisition of NextOp Software, Inc.

 SpyGlass design productivity enhancements expanded to functional verification for semiconductor and consumer electronics developers

SAN JOSE, Calif — June 20, 2012 — Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, today announced  that it has acquired NextOp Software, Inc., a leading provider of assertion synthesis technology. Atrenta’s products focus on improving efficiency and reducing cost for the design of complex semiconductor IP and system-on-chip (SoC) devices while NextOp’s products focus on improving efficiency and reducing cost for the functional verification of IPs and SoCs. The combination of both company’s products creates a more complete SoC Realization platform.

The acquisition of NextOp allows Atrenta to expand its de-facto standard SpyGlass® register transfer level (RTL) platform to include functional verification — an important and costly component of advanced SoC design.  Utilizing patented static and formal analysis techniques, the SpyGlass platform currently provides RTL design efficiency improvements in the areas of linting, clock synchronization, power optimization, testability, timing constraints and physical routing congestion. The SpyGlass platform will now be expanded to include functional verification support using NextOp’s patented dynamic assertion synthesis technology, resulting in verification efficiency improvements for semiconductor and consumer electronics developers.

“The addition of NextOp’s functional verification technology will give our customers a distinct advantage by providing complete coverage of front end design activities,” said Dr. Ajoy Bose, chairman, president and CEO of Atrenta. “Atrenta’s customers have come to rely on SpyGlass to verify a broad range of design intent, but functional verification was a missing part of our platform. NextOp’s assertion synthesis completes this part of our offering – Atrenta customers will now have added confidence that their designs will work as expected while meeting schedule and performance requirements. We are very excited to bring these innovative solutions and the resulting expanded benefits to our large customer base. ”

“Atrenta is one of the largest private EDA companies,” said Dr. Yunshan Zhu, president and CEO of NextOp Software.  “NextOp has pioneered assertion synthesis technology. Our tool is now widely deployed in production at multiple tier 1 customers – many of whom also use SpyGlass. Atrenta’s world-class field operation will further accelerate the mainstream adoption of assertion synthesis.”

“I’ve heard good things about NextOp’s verification technology from some impressive customers – the combination of Atrenta’s RTL design and NextOp’s RTL verification technology will improve the entire SoC Realization process,” said Jim Hogan, EDA industry veteran and private investor. “I’m also glad to see private/private acquisitions like this happening again after such a long dry spell. Atrenta could be leading a trend in renewed growth for the EDA sector.”

“With the acquisition of Magma there has been renewed talk about a roll-up in the middle of the EDA community,” saidGary Smith, founder and chief analyst for Gary SmithEDA.  “The most obvious candidates are the RTL sign-off tool vendors, and the most talked about driver, of the roll-up, has been Atrenta.  This could be the start of something big, and NextOp was an excellent place to start.”

NextOp’s BugScope assertion synthesis tool will be sold and supported by the combined Atrenta/NextOp worldwide field organization. Dr. Yunshan Zhu will assume the role of vice president, new technologies reporting to Dr. Ajoy Bose. Dr. Yuan Lu, co-founder and CTO of NextOp will assume the role of chief verification architect reporting to Dr. Zhu.  Financial terms of the transaction were not disclosed.

About Assertion Synthesis

Assertion synthesis leverages design and test bench information to automatically generate high quality assertions and functional coverage properties.  Generating assertions and coverage properties manually is tedious and error-prone. Assertions represent a machine-readable version of design intent and are used to improve verification completeness. Functional coverage properties identify functional coverage deficiencies providing guidance for verification teams. When used together, design teams can reduce functional verification time and improve overall functional coverage, resulting in lower design costs, better first-time silicon success and improved quality.

About Atrenta

Atrenta’s SpyGlass® Predictive Analysis software platform significantly improves design efficiency for the world’s leading semiconductor and consumer electronics companies. Patented solutions provide early design insight into the demanding performance, power and area requirements of the complex system on chips (SoCs) fueling today’s consumer electronics revolution. More than two hundred companies and thousands of design engineers worldwide rely on SpyGlass to reduce risk and cost before traditional EDA tools are deployed. SpyGlass functions like an interactive guidance system for design engineers and managers, finding the fastest and least expensive path to implementation for complex SoCs.  SpyGlass from Atrenta: Insight. Efficiency. Confidence.   www.atrenta.com

About NextOp Software

NextOp Software, Inc. is focused on delivering assertion-based verification solutions that allow design and verification teams to uncover bugs, expose functional coverage holes, and increase verification observability. NextOp’s BugScope assertion synthesis is the first product to automatically generate whitebox assertions and functional coverage properties in SVA, PSL and Verilog formats. BugScope’s properties are used to drive progressive, targeted verification via robust, executable design specifications for existing simulation, formal and emulation flows. The company is headquartered at2900 Gordon Avenue, Suite 100,Santa Clara,CA95051. For more information, visit www.nextopsoftware.com or call +1 408-830-9885.

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© 2012 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo and SpyGlass are registered trademarks of Atrenta Inc. BugScope and NextOp are trademarks of NextOp Software, Inc. All others are the property of their respective holders.

This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this press release.

 

 

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Lee PR does work for Atrenta

 

Stay tuned for a whole new mixed-signal world…..

Wednesday, June 13th, 2012

 

 

 

Ikutaro Kojima, editor of Nikkei’s Tech-On!, talked with ICScape at DAC about their products and their future plans for them.  Here is the link and a rough translation of the article:

 

http://techon.nikkeibp.co.jp/article/NEWS/20120604/221364/

 

ICScape not likely to announce mixed-signal EDA until end of year  [from DAC 2012]

2012/06/04 16:45

 Ikutaro Kojima, Tech-On!

 

With the 49th Design Automation Conference ready to open tomorrow, I spoke with EDA vendor ICScape Inc (which was established in 2005) about its soon-to-be introduced mixed-signal EDA system.

The company exhibited at the 2011 January EDS Fair in January 2011 here in Japan.  There, ICScape introduced back-end EDA tools for large SoC designs: e.g., for multi-corner multi-mode.  Those tools are 1) “TimingExplorer,” for MCMM optimization use just before timing sign-off; 2) “ClockExplorer,” used to convert clock synthesis input to existing constraints (MCMM);  3) “Skipper,” which quickly reads huge GDS-II files; and 4) “RCExplorer,” a parasitic parameter extraction tool for analog/mixed-signal IC.

In January 2011, the same month as EDSF2011, ICScape merged with China EDA vendor Huada Empyrean Software (HES), developer of RCExplorer. The remaining three products were developed by ICScape in the pre-merger period.  According to President Steve Yang, the merger is ideal and there is no post-merger overlap for products or customers. In other words, ICScape was primarily in the U.S. market for digital large-scale EDA tools, while HES was primarily in the Chinese market for analog EDA tools.

Based on OpenAccess

Both toolsets share the OpenAccess database as a platform.  According to Mr. Yang, the two companies are integrating their tools into a mixed-signal IC EDA toolset: “We are developing a new system for EDA (analog-digital-mixed IC).  It is almost complete, and is in the customer evaluation phase currently.  We expect to formally announce this toolset in the second half of 2012.”

Aiming for big analog · small digital

ICScape will officially announce an integrated analog-digital EDA system later this year. This product is for “big analog · small digital” IC designs (where the digital circuit is a small majority of the IC that is mixed in with the analog).  According to Mr. Yang, “big analog · small digital IC design is handled by one designer.  These designers are asking for a single system.”

Mr. Jason Xing, Vice President of Engineering, says that the key to development of the mixed-signal EDA system was the realization that digital and analog design is not separated and that it needed to be OpenAccess based.

 

 

 

 

 

 

 

 

 

 

Jason Xing and Steve Yang

 

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NOTE:  Lee PR does work for ICScape

 


Three rules to get greatest value from your IP libraries: Migration Migration Migration! Sagantec’s CEO talks to Luke Collins

Tuesday, June 12th, 2012

 

 

Luke Collins, editor, Tech Design Forums, talks with Sagantec CEO, Coby Zelnik, and CTO, Marten Berkens, about migration technology.

 

http://www.techdesignforums.com/blog/2012/06/05/dac2012-sagantec-offers-lifebelt-to-28nm-users-path-to-20nm-libraries/

 

 

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Note:  Lee PR does work for Sagantec

The SpyGlass® value interviews

Friday, June 1st, 2012

 

 

Atrenta has pulled together quite a slate of customers, partners, an industry observer and EDA’s premier investor to talk about the value SpyGlass brings to each of their realms. It’ll be interesting to hear how this signature product has proliferated in different environments! Atrenta invites you to stop by and hear how SpyGlass improves productivity @ Xilinx, Vivante, Sonics and Arteris and why Dan Nenni and Jim Hogan see SpyGlass as the consummate ubiquitous product in EDA.

The talks will be held at Atrenta’s booth #2230.

Monday, June 4

9:30 am…..Jack Browne, Sonics
10:30 am…Frederic Rivoallon, Xilinx
2:00 pm…..Halim Theny, Vivante

Tuesday, June 5

10:30 am…Charlie Janac, Arteris
2:00 pm…..Frederic Rivoallon, Xilinx
3:00 pm…..Dan Nenni, SemiWiki
5:00 pm…..Jack Browne, Sonics

Wednesday, June 6

10:30 am…Charlie Janac, Arteris
12:30 pm…Jim Hogan

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Note: Lee PR does work for Atrenta




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