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 The Breker Trekker  by Tom Anderson, VP of Marketing
Tom Anderson, VP of Marketing
Opening a TrekBox for Your Birthday
Over the more than three years of posts here on The Breker Trekker blog, you've seen us reference our TrekBox runtime component on many occasions. We mention it in many contexts: test case visualization, memory usage visualization, test case status, …

 What Would Joe Do?  by Peggy Aycinena
Peggy Aycinena
Verific: Rhymes with Terrific
  Michiel Ligthart, President and COO of Verific Design Automation, and Rick Carlson, VP of Worldwide Sales, have a proposal for young companies in the EDA industry and adjacent technologies: Come to Verific if your organization is early …

 IP Showcase  by Peggy Aycinena
Peggy Aycinena
UK’s ARM: We are all in this Alone together
  At this writing, midnight is approaching here in California, it's June 23rd, and highly anticipated news is arriving out of the UK. It's Friday morning there and the results of the Should I stay or Should I go referendum have been …

 Custom Layout Insights  by Graham Etchells, Director of Product Marketing at Synopsys
Graham Etchells, Director of Product Marketing at Synopsys
Custom Compiler In-Design Assistants (Part 1)
On-line Design Rule Checking (DRC) is nothing new. The technology has been in use for years in a variety of different layout editors and yet nearly every layout engineer has a love/hate relationship with it. Why? Well it really comes down to the use …

 Real Talk  by Graham Bell
Graham Bell
How SoC Design is Driving Constraints Management and Verification
There were a number of announcements at DAC 2016 in Austin concerning SDC timing constraints verification and management.  Real Intent announced the newest release of Meridian Constraints for sign-off of SoC designs. It features new and unique …

 Embedded Software  by Colin Walls
Colin Walls
C++ – for loops
I am [mostly] a fan of using C++ for embedded applications. I believe its use needs care, but broadly, I feel that it offers many simple improvements over C and appropriate use of object oriented techniques can be very beneficial. Today I want to …

 Bridging the Frontier  by Bob Smith, Executive Director
Bob Smith, Executive Director
The ESD Alliance at DAC
The Design Automation Conference is over. The cowboy boots, 10-gallon hats and “Keep Austin Nerdy” T-shirts have been put in storage until DAC returns to Austin next year. For those of you from the electronic system design ecosystem who didn’t …

 EDA Careers Corner and News  by Mark Gilbert
Mark Gilbert
DAC In Austin, What To Expect…How’s The Year Been For Start-Ups…Polish That Resume, You Never Know When…BEST TECH CARTOON I HAVE SEEN…
There is a significant amount of decent buzz surrounding DAC Austin, which for me, is a bit surprising.  On the plus side, I think DAC will see a lot of folks from the region that simply cannot make the trek west; the typical home for DAC.  …

 Decoding Formal  by Pippa Slayton
Pippa Slayton
Another Reason to Stay an Extra Day in Austin
If you are attending the Design Automation Conference (DAC) in Austin, Texas, June 5-9, and need a good reason to stay an extra day, look no further. Oski Technology is offering a one-day primer on advanced formal verification techniques at the …

 Aldec Design and Verification  by Henry Chan
Henry Chan
The UVM Configuration Database
When I want to wear a certain clothing item, I take out it of the closet. When I go shopping, I add those clothes it to my closet and there are now new items for me to pick out in the future. A database works much the same way, a collection of …

 Hardware Emulation Journal  by Lauro Rizzatti
Lauro Rizzatti
DAC Panel on Hardware Emulation’s Growing Use Models
Of course, anyone who reads my blog posts on EDACafe knows I have a huge bias toward hardware emulation –– In fact, my blog is called Hardware Emulation Journal! I’ve been a part of this Design Automation market segment since 1995 and continue …

 Guest Blogger  by Chuck Alpert - the General Chair for the 53rd DAC
Chuck Alpert - the General Chair for the 53rd DAC
#53DAC, 7: Fly brains, trillion-transistor devices and tales from a Steve Jobs alum
All of a sudden it’s nearly the end of April, high time to switch from months to weeks (just six to go now!) in the countdown to DAC, which I can guarantee is going to be a great conference. One big reason I’m confident is that, as always, we …

 What's PR got to do with it?  by Ed Lee
Ed Lee
What is in-situ de-embedding?
As a follow up to Chris Scholz’s predictions on 2016 signal integrity trends, we checked in with in-situ de-embedding inventor Dr. Ching-Chao Huang, who gives us a more detailed look at how engineers will need to handle signal integrity …

 Analog Insights  by Hélène Thibiéroz
Hélène Thibiéroz
Q&A with Altera: How to improve your advanced-node design productivity using Synopsys SPICE Simulation and Analysis environment
Greetings, You may have noticed from my previous post that we had a very successful event in Austin. I therefore wanted to share with you some of the technical content.  One of the aspects we cover is the increasing amount of analysis and …

 The Dominion of Design  by Sanjay Gangal
Sanjay Gangal
Median Income of Electrotechnology, IT Professionals Rises to $130,000 for Largest Gain in Past Five Years
Article source: IEEE Median income for electrotechnology and information technology professionals jumped by more than 4 percent in 2014, the largest increase in the past five years, according to the 2015 IEEE-USASalary & Benefits …

 Video Roundup  by Susan Smith
Susan Smith
HP Announces HP Z240 Tower and Z240 SFF Workstations
Jeff Wood - vice president, WW Product Management,  Workstation and Thin Client Business HP and Josh Peterson- director, WW Product Management,  Workstation and Thin Client Business , HP met with the press in a virtual press briefing prior to the …

 Verification Futures  by Mike Bartley
Mike Bartley
DVCon India expected to welcome over 600 delegates
The second DVCon India Conference is expecting to welcome over 600 delegates , up from 450 last year for the first conference. It is running in Bangalore on September 10th and 11th. But why should you be there too? 39 technical papers and 15 …

 Core Values  by Neil Parris
Neil Parris
7 things I learned at 52DAC
Last week I attended the Design Automation Conference as an intrepid reporter to put my ear to the ground and take note of what is happening in the industry. I wrote some daily review blogs of my time on the show floor (which can be seen here, Day …

 Disrupted Hard  by Matthieu Wipliez
Matthieu Wipliez
Numbers don’t lie: there is virtually no interest in high level synthesis
I finally read enough articles about high level synthesis (HLS) that give a sense of hype that just didn't seem to be matched by what I've heard. Now hype is pretty subjective, but numbers are not. For example, the High Level Synthesis group on …

 ExcelliBlog  by Rick Eram, Sales & Marketing VP
Rick Eram, Sales & Marketing VP
Value of timing constraints files beyond STA
Timing Constraint files are one of the best timing and clock data containers available to the designers, yet they are under utilized today and their value is not fully exploited in the design flow. The timing information captured in timing …

 The Instigater: Services with a Smile  by Arman Poghosyan
Arman Poghosyan
EDA Application Porting Guide: Part 1
Introduction With this article we would like to start a series of tutorials covering the migration of EDA applications from Windows to Mac OS X and GNU/Linux. For that purpose we will review the technologies for building user-interface, data layer …

 ASIC with Ankit  by Ankit Gopani
Ankit Gopani
Class – The Classic Feature – Part II
Dear AWA Readers Here we go with follow up post on ‘Class – The classical feature’ ! In this post I will try to cover different types of classes in brief for better understanding. There are various types of classes that we use in test …

 NOT EDA  by Sanjay Gangal
Sanjay Gangal
Satya Nadella Named Microsoft CEO
Article source: Microsoft Corp. & Wikipedia Microsoft Corp. today announced that its Board of Directors has appointed Satya Nadella as Chief Executive Officer and member of the Board of Directors effective immediately. Nadella previously …

 It's Verific !  by Michiel Ligthart
Michiel Ligthart
The demise of VHDL has been greatly exaggerated
I don’t recall when it was the first time that I heard VHDL was a dying language, but for sure it was many years ago, maybe as far back as the late 1990s. Obviously the EDA futurists of then got it very wrong, and I was recently wondering if I …

 AWR Insights  by Sherry Hess
Sherry Hess
AWR: Redefining Design
When I first learned of NI’s Redefining campaign, I thought… yes, makes perfect sense and fits AWR extremely well. Our company was founded almost 20 years ago on the very idea of redefining design for microwave/RF engineers. We began this …

 Dispatches from Boston  by Nanette Collins
Nanette Collins
OneSpin Reaches for the Cloud
As the 50th Design Automation Conference opens, attendees rushing through the doors early Monday may have their heads in a Cloud. Cloud computing that is, and heading straight toward Booth #846. That’s because OneSpin Solutions in Booth #846 …

 Verification is No Simulation  by Dave Rich
Dave Rich
Get your IEEE 1800-2012 SystemVerilog LRM at no charge
At this week’s DVCon 2013 conference, the IEEE Standards Association (IEEE-SA) and Accellera Systems Initiative (Accellera) have jointly announced the public availability of the IEEE 1800 SystemVerilog Language Reference Manual at no charge …

 Industry Commentary  by Dr. Russ Henke
Dr. Russ Henke
The EDA and MCAD/MCAE Almanac – Nominal Q3 2012 Part B: MCAD/MCAE Industry
Dear faithful blog reader: Please take a few minutes of your valuable time to read the January 31, 2013 article, “The EDA and MCAD/MCAE Almanac - Nominal Q3 2012 Part B: MCAD/MCAE Industry” You may reach the new January 31 Commentary by …

 IEEE CEDA Corner  by Joel Phillips
Joel Phillips
Alberto Sangiovanni-Vincentelli Celebrates ICCAD’s 30th Anniversary with Look Back at EDA
CEDA turned to Alberto Sangiovanni-Vincentelli of the University of California, Berkeley, to help us celebrate the 30 anniversary of the International Conference in Computer-Aided Design (ICCAD). And, he didn’t disappoint. In a rousing talk …

 EDA Thoughts  by Daniel Payne
Daniel Payne
DAC 2011 Trip Reports – Mostly Transistor Level Tools
2011 was the year of the foundry (TSMC, Globalfoundries, Samsung) at DAC in San Diego. The foundries had bigger booths, bigger events, were on more panel sessions, and had more marketing influence than any other year that I can remember. The …

 Global Business in EDA  by Mo Casas
Mo Casas
Are you missing the opportunity to go global? These tips will signal if you are ready
Expanding business overseas is important. If you are a small EDA vendor, going global before you are ready can be suicidal. Here are some signals that can help you decide you if you are ready to go global. Have you been successful at …

 Become Your Customers  by Saranyan Vigraham

 Open Electrons  by Chitlesh Goorah (Free Electronic Lab)
Chitlesh Goorah (Free Electronic Lab)
Milkymist: pushing further the limits of electronics openness
Everyone has heard of open source software, but can the same principles be applied to hardware? Some people argue that hardware is so expensive to manufacture and modify that it prevents hobbyists from contributing, and thus stifles …

 Stan on Standards  by Stan Krolikoski, Group Director of Standards, Cadence
Stan Krolikoski, Group Director of Standards, Cadence
Japan & SystemC
With all of the excitement in the “front end” of the SOC design/verification/modeling community about Accellera’s UVM, it is easy to loose track of work being done around another significant front end language—SystemC.  For those not aware, …

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