Posts Tagged ‘Tom Anderson’
Thursday, March 17th, 2016
Mentor Graphics’ Tom Fitzpatrick gave a lunchtime talk at DVCon several weeks ago summarizing recent efforts to build a standard [set of standards?] around portable stimulus for verification. The room was packed with over 200 people and his talk was sufficiently complete, nobody asked any questions.
After his presentation, however, I did hear some comments. Namely that these types of standards are quite complex and difficult to develop. Hence, setting an actual delivery date of January 2017 for Portable Stimulus Standard Version 1 [PSS V1] is quite aggressive and optimistic.
I was not fully informed about Accellera’s Portable Stimulus Working Group [PSWG] prior to Fitzpatrick’s talk, so could not judge whether January 2017 is or is not overly optimistic as a delivery date for the standard. Since DVCon, I have studied the slides and attempted to better understand what this is all about: What is a Portable stimulus and what would a set of standards look like?
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Tags: Accellera, Accellera PSWG, Agnisys, AMD, AMIQ EDA, Analog Devices, Breker Verification Systems, Cadence, Cisco, DVCon, Faris Khundakjie, IBM, Intel, Mentor Graphics, NVIDIA, NXP, Portable Stimulus Working Group, Qualcomm, Semifore, Synopsys, Tom Anderson, Tom Fitzpatrick, Vayavya Labs
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Monday, February 4th, 2013
Breker Verification Systems VP Tom Anderson presented a concise tutorial on low-power SOC verification at DesignCon on January 30th. He began by laying out the challenges of low-power design, with an eye to the verification problems associated with various strategies:
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Low-power SOC verification …
The need for low-power design is ubiquitous, with today’s plethora of consumer devices being battery-powered. ‘Big iron’ machines in modern data centers are also driving the need for low-power chips. As well, governments worldwide – especially in Europe – are passing ‘green’ laws; if you’re building a ‘big iron’ class of machine, you may be required by law to meet specified power limits.
There are various techniques emerging to meet these needs. Circuit-level design strategies include special transistor and cell design for non-critical paths. Different voltage thresholds are also an option, yielding a variety of performance levels and power consumption at different points on-chip; designers can make a one-time trade-off between performance level and path options on-chip. These techniques have little or no impact on functional verification. Other strategies, however, do.
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Tags: Breker Verification Systems, DesignCon, Low-power SoC verification, Tom Anderson
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Thursday, January 31st, 2013
Just past 8:00 am in the Santa Clara Convention Center on Wednesday, January 30th, I had the good luck to run into IEC’s Dr. Barry Sullivan, long-time leader at DesignCon. Conversation’s always relaxed in that hour at any conference, and so it was with Barry. I asked him how things go with DesignCon, now that it’s owned and operated by UBM.
[Barry’s tenure with the conference predates the 2010 purchase of the conference by UBM, discussed here in a blog posted at the time by former EE Times Editor Nic Mokhoff.]
Barry said that UBM’s skill set is exactly aligned with the needs of DesignCon, and that’s a good thing. He said having a media company like UBM in charge is excellent for the conference. In the years prior to the acquisition, Barry said, the conference would sometimes have to “beg” the press to cover the event. With UBM at the helm, however, he said press coverage has been stupendous. I asked Barry if he thought DesignCon was out to replace DAC.
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Tags: Barry Sullivan, DAC, Santa Clara Convention Center, Tom Anderson, UBM
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Thursday, April 26th, 2012
Here in Silicon Valley, there’s a small company that should be on your radar. Founded in 2003 as a consulting service, the company discovered their solutions – developed to address customers’ verification problems – had become sufficiently robust to be commercialized. Over time, those solutions proved so successful that Breker Verification Solutions morphed into a 100-percent product company.
No longer a consultancy, Breker is thriving today, actively hiring with multiple openings posted on their website. and just this week named well-known EDA veteran Tom Anderson as Vice President of Marketing. I had a chance to speak by phone this morning with Tom Breker, CEO Adnan Hamid, and company CFO Maheen Hamid.
Adnan addressed the challenge of morphing from consultancy to product company: “As we have figured out how to do this, we feel we have done it with style. But still it’s true, this is a very hard path.”
Tom added, “We are relatively small, but already with people in Europe, India, and the U.S., and we have plans to grow over 2012 – looking for good AEs and hiring in R&D to implement the ideas customers constantly come up with. Our momentum is building as we cast a wide net for great employees, and work to serve our customers even more. So that’s the top-level view of company.”
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Tags: Adnan Hamid, Breker, Breker Verification Solutions, Destructive testing, Maheen Hamid, SOC verification, Tom Anderson
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