Posts Tagged ‘Oasys’
Thursday, June 23rd, 2016
Michiel Ligthart, President and COO of Verific Design Automation, and Rick Carlson, VP of Worldwide Sales, have a proposal for young companies in the EDA industry and adjacent technologies: Come to Verific if your organization is early stage, in need of encouragement and wise counsel, and could benefit from access to Verific software to help you progress towards a commercial product launch.
In a recent phone call, Ligthart and Carlson explained the specifics of the Verific program, and delineated what it’s not: “We are not funding startups,” Ligthart said, “but we have changed our business model over the lifetime of our company to encourage innovation.
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Tags: Austemper, Cadence, Innergy Systems, Joe Costello, Mentor Graphics, NextOp, Oasys, Paul van Besouw, Rick Carlson, Sanjiv Kaul, Synopsys, Tortuga Logic, Verific Design Automation No Comments »
Monday, April 21st, 2014
In the moments prior to Cadence’s quarterly earnings call this afternoon, the company released news of the acquisition of Jasper Design Automation for $170 million, less $24 million in cash, and a small tremor rippled out across the EDA Nation.
Paraphrasing Cadence CEO Lip-Bu Tan in the early minutes of his 5pm ET earnings call: We are very pleased to announce a definitive agreement to acquire Jasper Design Automation. This will help us to further meet our customers’ needs for more advanced verification solutions, particularly today as verification now represents 70% of the cost of SoC development. Together, Cadence and Jasper can move forward, offering the strong formal verification solutions leading customers need. In addition, Cadence is also very pleased to be bringing on board the strong team at Jasper, a team with excellent real-world experience.
All good stuff, yes? So why any tremors in our beloved little EDA Nation?
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Tags: Aart de Geus, BDA, Cadence, Coverity, EDAC, formal verification, Forte, Innovation, Jasper Design Automation, Kathryn Kranen, Lip-bu Tan, M&A in EDA, Mentor Graphics, Oasys, Synopsys, Wally Rhines 1 Comment »
Thursday, September 26th, 2013
A Professor, a Sage, and a Guru walked into a bar. Brian the Bartender, greeted them: “What’ll it be, boys?”
The Professor said, “We need some help, Brian, settling an argument.”
“No problema,” Brian the Bartender said. “I’ve got an answer for everything.”
“Well,” the Professor said, “I think ESL’s not going to happen in our lifetime, but the Guru here says it’s just around the corner now that he and his have finally got all the pieces of the flow in place.”
Brian the Bartender laughed, “Yeah, the Guru’s been saying that since the dawn of mankind!”
“Exactly,” the Professor said.
Again Brian the Bartender laughed, “Guru, can you defend yourself? And don’t even think about plunking your wordy White Paper down on the bar. This is a public house, not a public library.”
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Tags: Apache, ARM, Atrenta, Cadence, Cadence System-to-Silicon Verification Summit, Calypto, DOCEA, Duolog, ESL, Forte, Green Hills, Imperas, Intel, Jasper, MathWorks, Mentor Graphics, NVIDIA, Oasys, OneSpin, Real Intent, Synopsys, Verification, Wind River 1 Comment »
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