Posts Tagged ‘EDPS’
Thursday, August 3rd, 2017
Of all of the EDA-related conferences that have taken place over the years, one of the very best has probably been one of the least well-known.
EDPS – the Electronic Design Process Symposium – has been held for the last 24 years in the spring in Monterey. The beloved destination of the late, great Gary Smith, EDPS has been host to some of the most informed conversations, esteemed speakers, and highest caliber content in EDA. Ever.
And now – proving that it actually is possible to improve Best in Class – the organizers of EDPS have made two radical changes, changes that will have far-reaching impact for the conference and its excellent content.
For the first time this year, EDPS is going to be in Milpitas, not 2 hours south in Monterey, and the conference is going to be happening in September, not April.
This is great news. Now people who live and work in Silicon Valley can more easily access the 2-day program and can more readily partake of the content. And those flying in from out-of-town can get to the conference venue more quickly without a long, strenuous drive to the coast.
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Tags: EDPS, Electronic Design Process Symposium, Gary Smith, Shishpal Rawat No Comments »
Thursday, May 5th, 2016
Luckily I arrived late to EDPS in Monterey on Friday, April 22, because I did not hear the introduction of the first keynote speaker or hear his name. A good thing, as it turns out. The speaker was a technologist who doesn’t embrace technology when it’s used as a tool for intrusions into our lives. He’s concerned about how our private facts have become part of the public fabric, accessible to anyone who knows how to navigate the Cloud.
And so, in the spirit of Life imitating Art, I’m not going to list his name here. That detail is fully available on the EDPS website, but it will not be articulated here. What will be articulated here, however, is the audience reaction to the Keynoter’s comments. The audience became part of the presentation, with the keynote address quickly morphing into a round table discussion, a group therapy session for technology whiz-kids who worry about the increasingly public nature of our private lives in this digital, always-connected era.
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Tags: Amazon, EDPS, Facebook, Google, IoT, Samsung, Tesla, US OPM 1 Comment »
Thursday, March 24th, 2016
To speak with Herb Reiter about the rationale for multi-die packaging is a chance to follow a logical and energetic continuum from first principles to a final conclusion. Namely, that as the era of the ASIC subsides, the era of the multi-die package will arrive full force.
Reiter, President of eda 2 asic, will be reiterating this line of thinking, in conjunction with a panel of like-minded experts, at the upcoming EDPS conference in Monterey on April 21st. In anticipation of that session – “Multi-Die IC Design and Application” – we spoke by phone this week. The conversation was compelling.
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Tags: Asim Salim, autonomous driving, Cliff Hou, Dusan Petranovic, eda 2 asic, EDPS, Ford, Gary Smith, Google, Herb Reiter, ITRS, Ivor Barber, Multi-die packaging, Paul Silvestri, Riko Radojcic, TSMC 1 Comment »
Thursday, April 17th, 2014
Overlooking the inky calm of Monterey Bay, the lights of tethered boats in the marina reflecting in the shimmering waters below, Wally Rhines delivered a mesmerizing after-dinner keynote on Thursday night, a gift to an intimate group of EDPS attendees assembled in the low-slung Monterey Bay Yacht Club adjacent to the municipal pier.
It was textbook Rhines: a detailed re-telling of the last 50 years of the semiconductor industry with a log-log analysis of the validity of various versions of Moore’s Law, a dizzying display of data on shrinking feature sizes, and an adamant admonition that the law is, in fact, an economic learning curve with applicability that extends beyond the narrow confines of electronics.
From there, Rhines talked at length about what constitutes a process node, the gulf between Engineering’s obsession with gate length and Marketing’s obsession with world domination, and how reality got so out of whack with message that in recent years the ITRS had to step in and put an end to a war of claim versus counter-claim. Nonetheless, per Rhines, one company’s 16nm today is another company’s 14nm, as the murky physics behind the labels obfuscates to confuse the customer and confound the competition.
But the real core of Rhines’ talk was still to come: He addressed the issue of margins, head-on, across the entire spectrum of the semiconductor food chain, one micro-segment at a time. To do this to completion required many more charts, extensive additional analysis, and a lot more time. Yet, even as the hands of the clock over the bar inched well past 9 pm, no one in the room budged, yawned, or dozed – so complete was Rhines’ mastery of the material and command of the context. It was brilliant.
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Tags: EDPS, Mentor Graphics, Moore's Law, Wally Rhines 3 Comments »
Thursday, April 3rd, 2014
There are lots of clever ways to tell you why it’s worth your while to attend EDPS in Monterey on April 17th and 18th. It’s less noisy than DAC, less vendor-specific than CDNLive, SNUG or U2U; less crowded than ISSCC; has fewer presentations than DVCon; and boasts no co-located events to confuse your schedule like at ISQED. But that doesn’t tell you why EDPS is worthwhile. It’s the list of speakers and the setting that should convince you to carve out some time on that Thursday and Friday to run down to Monterey – a scenic hour’s drive from Silicon Valley – to attend the 21st annual Electronic Design Process Symposium.
On Thursday, Wally Rhines is giving the keynote after dinner; during the day, Gary Smith’s moderating a session on design flow challenges that includes Frank Schirrmeister, John Swan, Gene Matter, Jim Kenney, and Naresh Sehgal; Sehgal’s leading a session on pre-silicon software development platforms that includes Camille Kokozaki, Shantanu Ganguly, Kumaraswamy Namburu, Schirrmeister, and Vicki Mitchell; Herb Reiter’s moderating a session on FinFETs, 3D-ICs, and FDSOI, that includes Jamil Kawa and Paul McLellan; and the kick-off keynote on Thursday morning will be given by Intel’s Chris Lawless talking about pre-silicon platforms for software development.
On Friday, Dan Nenni’s leading a whole day on IP that includes Martin Lund, Patrick Soheili, Warren Savage, Kurt Shuler, Lluis Paris, Carey Robertson, and Bernard Murphy. Finally, Aparna Dey is General Chair for EDPS. All together, that’s 24 people and a robust ecosystem of knowledge and experience comprising this year’s EDPS program.
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Tags: Aparna Dey, Bernard Murphy, Camille Kokosaki, Carey Robertson, Chris Lawless, Dan Nenni, EDPS, Electronic Design Process Symposium, Frank Schirrmeister, Gary Smith, Gene Matter, Herb Reiter, Jamil Kawa, Jim Kenney, John Swan, Kumaraswamy Namburu, Kurt Shuler, Lluis Paris, Matin Lund, Naresh Sehgal, Patrick Soheili, Paul McLellan, Shantanu Ganguly, Vicki Mitchell, Wally Rhines, Warren Savage 1 Comment »
Friday, April 6th, 2012
It’s April 2012, and both spring and 3D-ICs are in the air. But if Spring means April showers and May flowers, what do 3D-ICs mean?
Well, if you were at EDPS in Seaside this morning, at the Monterey Beach Resort, you would have heard from a host of speakers all addressing the April showers and May flowers of 3D-ICs. The session was organized and well moderated by eda2asic’s Herb Reiter.
* Showers –
Heat … 3D-ICs kick up a lot of thermal issues between the layers.
* Flowers –
Multiple solutions are under consideration for heat. If you’re rich like IBM, you talk about micro-channels where cooling waters will flow. If you’re not rich – like everybody else – you don’t yet know what to do to sink that heat off-chip and out of harm’s way. Micro channels are too exotic, so stay tuned as solutions are sought out and implemented.
* Showers –
EDA Flow … it’s not quite here, according to many, even though the current tools may be good enough for some. Most believe there are larger needs that should be met.
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Tags: 3D-ICs, eda2asic, EDPS, Herb Reiter No Comments »
Thursday, March 29th, 2012
Here are the Top Ten reasons to be going to EDPS next week in Monterey:
10) Next week’s a lighter work week for most and the Monterey Peninsula is beautiful at any time of the year, but particularly in the spring.
9) The Electronic Design Process Symposium is in its 19th year, and everybody who’s anybody in EDA and its adjacencies has attended at one point or another.
Eight) The topics discussed at EDPS have always tracked the trajectory of the industry. In 2000, those topics included: deep sub-micron, distributed and web-based design methodologies, designer productivity, and maintaining modularity in an integrated design flow.
Here in 2012, technology evolution has driven a completely different set of topics: embedded processors, FPGAs, ESL, NUMA, EDA in the Cloud, Big Data and the Big Servers that serve them, low-power design, and 3d-ICs, among others.
7) Going to conferences is as much about conversations outside the sessions, as it is about presenting or listening within the sessions. EDPS is a boutique conference, where I promise you’ll have a chance for substantive conversations with the speakers, both inside and outside of the sessions.
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Tags: 3D-ICs, Altera, Arif Rahman, Azadeh Davoodi, Cadence, Deepak Sekar, Don MacMillen, Dusan Petranovic, EDPS, Electronic Design Process Symposium, Frank Schirrmeister, Gary Smith, Grant Martin, Hans Spanjaart, Herb Reiter, Ian Ferguson, James Colgan, Jim Hogan, Kiron Pai, Marc Greenberg, Mentor, Mike Hutton, Monterey Peninsula, Naresh Sehgal, Phil Marcoux, Qi Wang, Riko Radojcic, Samta Bansal, Sandeep Goel, Sangeeta Aggrwal, Sri Ganta, Steve Leibson, Steve Smith, Steven Pateras, Synopsys, Tom Spyrou 2 Comments »
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