Posts Tagged ‘DVCon 2013’
Thursday, February 28th, 2013
I don’t know about you, but I thought DVCon 2013 in San Jose this week was super. There was a lot of energy, I never heard anybody say the tools are broken (something industry pundits have been droning on about for years), attendance at the conference set a new record, both verification and design guys seemed to indicate that verification is still important enough to remain discrete from design, and SystemVerilog is fulfilling its promise.
The following list of 15 sound bites is not a complete representation of all that was said or debated at DVCon. Nonetheless, it’s an interesting list and reflects some of the information and opinions showcased during the week.
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Tags: Brain Bailey, Dave Rich, DVCon 2013, Gary Smith, Harry Foster, John Goodenough, Wally Rhines, Ziv Binyamini]
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Thursday, February 28th, 2013
Sometimes magic happens at panel discussions at technical conferences, and that was the case mid-day on Wednesday at DVCon in San Jose this week, where the conversation was lively, entertaining and informative on the pedestrian, albeit foundational, topic of “Best Practices in Verification Planning.”
Ironically, the hour-long conversation did not appear to be planned at all, but to be organic and spontaneous. The Cadence-sponsored lunch and panel discussion, moderated by Cadence’s John Brennan, included Verilab’s Jason Sprott, Cadence’s Mike Stellfox, ParadigmWorks’ Ambar Sarkar, Maxim’s Neyaz Khan, Oski Technology’s Vigyan Singhal, and Xilinx’ Meirav Nitzan. The panelists began with an overview of their experiences.
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Tags: Ambar Sarkar, Cadence, DVCon 2013, Jason Sprott, John Brennan, Maxim, Meirav Nitzan, Mike Stellfox, Neyaz Khan, Oski Technology, ParadigmWorks, Verification Planning, Verilab, Vigyan Singhal, Xilinx
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Thursday, February 21st, 2013
You may think it’s a cliché, but it turns out there is such a thing as a free lunch at DVCon 2013 from February 25th to 28th at the DoubleTree in Santa Clara.
If you attend all 4 days of the conference, you will be the guest of the Accellera Systems Initiative, Mentor Graphics, Cadence, and Synopsys on Monday, Tuesday, Wednesday, and Thursday, respectively. More important than the food, however, is the exposure to the learning — albeit with a heavy dollop of company messaging on top. You should be there.
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Tags: Accellera Systems Initiative, Cadence, DVCon 2013, Free Lunch, Harry Foster, John Brennan, Mentor Graphics, Synopsys, Wilson Research Group Functional Verification Study, Yatin Trivedi
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