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EDACafe Editorial

Posts Tagged ‘ATopTech’

Mark Gilbert: White coat, White hat, Big fish

Thursday, June 30th, 2016

Exuberance and Optimism: the only two words required to describe EDA-Careers’ Mark Gilbert – even after 20 years in the trenches sorting out the who what and where of just about everybody in the EDA industry. Yes, he self-identifies as the fun guy in the white suit, seen hither and yon wherever the EDA Nation chooses to confab, but in reality he’s the good guy in the white hat who’s going to tell it to you straight, about your career and your goals.

Also by his own description, Mark Gilbert is “the big fish in a little pond” who serves as the leading head hunter and career counselor extraordinaire of EDA.

I was lucky enough to speak with Gilbert by phone this week. As he and I were both on the East Coast, coordinating the hour of the call was easy. Our conversation started with the usual query: How did you get started in this business?

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Tags: Aart de Geus, Altera, ATopTech, Cadence, EDA, EDA-Careers, Mark Gilbert, Mentor Graphics, Synopsys, Wally Rhines
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pre-DAC 2013: TSMC certifies ATopTech, CDNS, MENT, SNPS

Thursday, May 30th, 2013

In the old days, TSMC made a big toolflow announcement every year at DAC, and hosted a lively ‘partner pavilion’ where dozens of companies were showcased in small auxiliary booths that stood in addition to their conventional booths elsewhere in the Exhibit Hall.

At DAC 2103 in Austin, however, something different is happening. Hosted by GlobalFoundries, this year’s ‘foundry pavilion’ will showcase countries, not corporations: “The DAC Global Forum celebrates contributions and future plans of nations around the globe to the field of electronic design in past (sic) 50 years.” Should be very interesting; check out Booth #137 in Austin.

In the meanwhile, TSMC’s taking this week prior to DAC 2013 to announce various tool certifications, including FinFET v0.1 design enablement: “The tool certification serves as the foundation of design infrastructure for 16-nanometer FinFET technology.”

It’s always fun to read through these types of joint announcements, at least if you’re easily amused by the exercise of comparing the quotes embedded in dueling Press Releases. TSMC Senior Director Suk Lee, for instance, is quoted in all four press releases paraphrased below, sent out this week from ATopTech, Cadence, Mentor, and Synopsys.

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Tags: ATopTech, Bijan Kiani, Cadence, DAC 2013, DAC Global Forum, GlobalFoundries, Jue-Hsien Chern, Mentor Graphics, Michael Buehler-Garcia, Ping Hsu, Suk Lee, Synopsys, TSMC, TSMC FinFET v0.1
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BDA: Two different definitions at DAC

Tuesday, July 10th, 2012

It’s stranger than fiction, but there are actually two different entities at DAC that bear the name BDA, and they’re both acronyms.

One is a company very familiar to the EDA space, Berkeley Design Automation. As you know, President & CEO Ravi Subramanian has just been elected to a second term as a member of the Board of Directors of EDAC.

Subramanian’s BDA is in the news again this week because they just announced that ATopTech, also an EDA company, is now using BDA’s Analog FastSpice to “enhance the accuracy of the timing analysis in [ATopTech’s] Aprisa P&R product for designs at advanced process technology nodes such as 28nm and 20nm..”

So what is the other BDA at DAC? It’s Biological Design Automation. The International Workshop on Biological Design Automation figured large on Sunday and Monday, June 3rd and 4th, in San Francisco where it was again co-located with the Design Automation Conference, as it has been for several years.

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Tags: ATopTech, BDA, Berkeley Design Automation, Biological Design Automation, DAC, IWBDA, Ravi Subramanian
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