On a phone call last week with the DVCon 2016 General Chair, Synopsys’ Yatin Trivedi, and 2016 Technical Program Chair, eInfochips’ Ambar Sarkar, I was again reminded of two unalienable truths: DVCon is a labor of love for those who have been involved for so long, and without these people the conference simply would not exist.
DVCon is the granddaddy of all design and verification conferences. It’s been housed annually in Silicon Valley since before the beginning of time, this year from February 29 to March 3 at the DoubleTree Hotel. As inevitable a part of the yearly conference cycle as DVCon may be, however, always remember that nothing is forever.
Learning and networking opportunities like DVCon only exist because a group of over-achieving volunteers continue to infuse the event with their special brand of energy and credibility. The conference goes on and on, because of the selfless dedication of the folks who carve time out of their busy professional lives to lead it — to solicit, vet and assemble the technical program, and to solicit, vet and assemble the exhibition hall (a unique ‘science fair’ sort of a deal that opens every afternoon after the technical sessions have wrapped up for the day).
But these kinds of volunteers do not always step forward and even when they do contribute at this level, their efforts often go unnoticed. Hence, when you think of DVCon, remember to be grateful to the team that brings it to you. Nothing lasts forever, even if DVCon seems likes it could. End of sermon.
DVCon is coming to San Jose from March 2nd to 5th. If you have any doubts about going, you should spend 12 minutes watching my interview [YouTube link below] with DVCon General Chair Yatin Trivedi of Synopsys and Technical Program Committee Chair Ambar Sarkar of Paradigm Works. The sheer joy these two gentlemen and their team are bringing to the work of organizing the upcoming event is totally evident there. And as they explain so well, these days that joy is not just limited to DVCon San Jose.
Now Yatin and Ambar, and many like-minded volunteers, are spreading the good works of the conference around the globe with DVCon Europe and DVCon India, newly launched companion events that debuted in 2014. Both were sell-out successes, according to Ambar and Yatin, and will now provide two additional opportunities each year for design and verification engineers to network, learn, and contribute. An impressive outcome of the efforts of so many, as noted enthusiastically in the interview.
If ever there was a year when you thought to attend DVCon, this should be it, according to a recent phone call with Cadence Fellow Stan Krolikoski, serving as General Chair for the second year in a row. That’s because DVCon 2014 will be serving up the D and the V in equal measure, and won’t be skewed towards the V in DVCon as it has been [perhaps] in the past.
Per Stan, “We’ve gotten feedback every year from attendees that they want more emphasis on design. They say they like verification, but they want more design, so last year I gave marching orders to the Technical Program Committee [headed by Paradigm Works’ Ambar Sarkar] that they should add more people on the review committee who represent design.
“It’s actually been a long time in coming. Although last year was the 25th anniversary of the conference, 10 years ago the name was changed to DVCon. Prior to that, it was HDLCon and the content reflected that name. When the name was changed to DVCon it was supposed to include both design and verification, but [functional verification emerged as the larger focus].”
That focus meant that those types of experts tended to dominate attendance, according to Stan, but that’s been fixed this year: “We will still have excellent functional verification sessions at DVCon – everything for the beginner through to the guru, it’s all there – but we will also have sessions on low-power design, on analog/mixed signal, and on system-level design, as well as IP integration. We’re clearly moving away from just verification in adding lots of design content to the program that’s of interest to our audience.”
Sometimes magic happens at panel discussions at technical conferences, and that was the case mid-day on Wednesday at DVCon in San Jose this week, where the conversation was lively, entertaining and informative on the pedestrian, albeit foundational, topic of “Best Practices in Verification Planning.”
Ironically, the hour-long conversation did not appear to be planned at all, but to be organic and spontaneous. The Cadence-sponsored lunch and panel discussion, moderated by Cadence’s John Brennan, included Verilab’s Jason Sprott, Cadence’s Mike Stellfox, ParadigmWorks’ Ambar Sarkar, Maxim’s Neyaz Khan, Oski Technology’s Vigyan Singhal, and Xilinx’ Meirav Nitzan. The panelists began with an overview of their experiences.
