Posts Tagged ‘3D-ICs’
Thursday, May 16th, 2013
Let’s be honest. If you haven’t booked your flight and hotel yet for the Design Automation Conference in Austin in the first week of June, you’ve probably decided you’re not going. If that’s the case, more’s the pity because the sessions alone are going to be great, above and beyond the parties and networking, and will make the trip totally worthwhile. Here’s a sampling of the some of the topics that will be among the most compelling, with an acknowledgment that not everybody’s interests are the same.
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Tags: 3D-ICs, Applications & Architecture, Automotive Electronics, DAC, Design Automation Conference, finFET, Power & Thermal Constraints, Silicon Defects, Silicon Flashlight, System Design
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Wednesday, July 11th, 2012
The concept of a Grand Challenge is an established one in engineering, so here in 2012 what are the Grand Challenges in EDA? Let’s go out on a limb and name a few candidates:
No.1) Low power: This is the critical problem here in the era of mobile everything. If you can’t guarantee low power for your device, it’s going to go dark way too soon and be way too hot in the meanwhile. Great challenges remain in perfecting the tools to make this all happen.
No.2) Formal verification: There just has to be a way to guarantee that what we meant to design, has been designed and then manufactured. Isn’t that the goal of formal verification, and isn’t it true that we’re not quite there yet?
No.3) 3D-ICs: In the last several years, this one’s gotten a lot of attention, but it appears that there’s still a lot of work to do – at least on the logic side of the equation. Clearly more tools are needed.
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Tags: 3D-ICs, co-design, EDA, formal verification, Grand Challenge, hardware/software co-design, low power, reconfigurable hardware, system-level tools
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Friday, April 6th, 2012
It’s April 2012, and both spring and 3D-ICs are in the air. But if Spring means April showers and May flowers, what do 3D-ICs mean?
Well, if you were at EDPS in Seaside this morning, at the Monterey Beach Resort, you would have heard from a host of speakers all addressing the April showers and May flowers of 3D-ICs. The session was organized and well moderated by eda2asic’s Herb Reiter.
 * Showers –
Heat … 3D-ICs kick up a lot of thermal issues between the layers.
* Flowers –
Multiple solutions are under consideration for heat. If you’re rich like IBM, you talk about micro-channels where cooling waters will flow. If you’re not rich – like everybody else – you don’t yet know what to do to sink that heat off-chip and out of harm’s way. Micro channels are too exotic, so stay tuned as solutions are sought out and implemented.
* Showers –
EDA Flow … it’s not quite here, according to many, even though the current tools may be good enough for some. Most believe there are larger needs that should be met.
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Tags: 3D-ICs, eda2asic, EDPS, Herb Reiter
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Thursday, March 29th, 2012
Here are the Top Ten reasons to be going to EDPS next week in Monterey:
10) Next week’s a lighter work week for most and the Monterey Peninsula is beautiful at any time of the year, but particularly in the spring.
9) The Electronic Design Process Symposium is in its 19th year, and everybody who’s anybody in EDA and its adjacencies has attended at one point or another.
Eight) The topics discussed at EDPS have always tracked the trajectory of the industry. In 2000, those topics included: deep sub-micron, distributed and web-based design methodologies, designer productivity, and maintaining modularity in an integrated design flow.
Here in 2012, technology evolution has driven a completely different set of topics: embedded processors, FPGAs, ESL, NUMA, EDA in the Cloud, Big Data and the Big Servers that serve them, low-power design, and 3d-ICs, among others.
7) Going to conferences is as much about conversations outside the sessions, as it is about presenting or listening within the sessions. EDPS is a boutique conference, where I promise you’ll have a chance for substantive conversations with the speakers, both inside and outside of the sessions.
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Tags: 3D-ICs, Altera, Arif Rahman, Azadeh Davoodi, Cadence, Deepak Sekar, Don MacMillen, Dusan Petranovic, EDPS, Electronic Design Process Symposium, Frank Schirrmeister, Gary Smith, Grant Martin, Hans Spanjaart, Herb Reiter, Ian Ferguson, James Colgan, Jim Hogan, Kiron Pai, Marc Greenberg, Mentor, Mike Hutton, Monterey Peninsula, Naresh Sehgal, Phil Marcoux, Qi Wang, Riko Radojcic, Samta Bansal, Sandeep Goel, Sangeeta Aggrwal, Sri Ganta, Steve Leibson, Steve Smith, Steven Pateras, Synopsys, Tom Spyrou
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