Beyond Portable Stimulus 1.0

With the release of the 1.0 version of the Portable Stimulus Standard (PSS), the industry now has a solid base on which to build solutions and to ensure that the time and investment made by users to create verification intent models is portable. This should allow them to assess tools and decide which one fits their requirements best and which ones will fulfill their roadmap into the future. Unfortunately, it is not quite as easy as that, because many users have already moved beyond the basics as represented in the standard.

Committee members are taking a well-earned rest after working on this for three years. But we cannot afford to rest too long. The 1.0 release was not the end of the road –– it was merely the on-ramp toward a long road ahead. A lot is missing from the standard.

At the beginning of the process, a set of requirements were compiled. This amounted to a spreadsheet containing more than 160 lines of requirements coming from a diverse mix of users and vendors. According to Accellera, the 1.0 release had over 90% of the requirements that were at least either fully or partially met. We estimate that it is closer to 50% and one user company almost voted against approval of the standard because they figure it to be less than 50%.

Even with the most optimistic figure, does that mean we have only 10% to go? I wish it were that easy. It may well be like the old adage that says the first 90% took 10% of the time and the last 10% will take 90% of the time. If that is anywhere close to being true, we have another 27 years of work ahead of us, and that presumes that no new requirements are added to the list.

Some of the missing items are big, such as the requirement to support analog. A large body of experts is working on making this a reality within SystemVerilog and it has some tough issues that need to be addressed. Questions come up about this at seminars and panels associated with the standard, so there is clearly a need. This item alone will require a complete sub-committee working for years.

But there are many important things slated to be in the 1.0 release that just didn’t make it. One example is the inclusion of a hardware/software interface (HSI) layer. This becomes a big deal when looking at doing system-level verification, where functionality is not purely defined by hardware, but requires the ability to bring in various level of production software. The HSI layer provides important services such as memory allocation, register definitions and memory maps. These are capabilities that SystemVerilog users have and expect to be in their verification solutions

Some argue that this is just a nice-to-have feature because a user can do everything necessary with the standard as it exists. That may be true, but it doesn’t mean that it is easy, not error prone, or an efficient use of the user’s time. This is a subject that many of the requirements touched on and some of them cannot be fully addressed until this problem is solved.

In a recent interview on Semiconductor Engineering, Lu Dai, Chairman of Accellera, admitted that vendors, such as Breker, will provide solutions that go beyond the capabilities defined by PSS 1.0. This is necessary so that important features are not taken away from existing users of the proprietary tools. While not ideal, it is important that these necessary features are brought into the standard as quickly as possible. Breker will certainly be providing a comprehensive HSI layer.

As the committee regroups, one of our first actions will be to go back over the list of requirements and assess their importance. If you, as a user, want to get involved with a standards organization, now is the time. This is when you can see if there are requirements missing that would be important to you, to vote on the importance of each and to drive what should be in the 1.1 release.

Are you unhappy about aspects of the standard that did not make it into 1.0? The standard exists to provide capabilities demanded by users to get their job done in an efficient and effective manner,  and not about what certain EDA vendors know how to implement today. You can vote with your pocketbook, or you can directly influence the direction of the standard. We will continue to make sure that users of the Breker tool suite never lose capabilities that they have enjoyed in the past, but we all want them integrated into the standard as quickly as possible. Together we can do this.

Tags: Accellera, Breker, HSI, Lu Dai, portable stimulus, PSS, PSWG, SystemVerilog

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