The Breker Trekker Tom Anderson, VP of Marketing
Tom Anderson is vice president of Marketing for Breker Verification Systems. He previously served as Product Management Group Director for Advanced Verification Solutions at Cadence, Technical Marketing Director in the Verification Group at Synopsys and Vice President of Applications Engineering at … More » A Matched Pair of Panels at DAC in AustinMay 28th, 2013 by Tom Anderson, VP of Marketing
In my previous post on Breker activities at the upcoming Design Automation Conference (DAC) in Austin, I mentioned two verification panels. I’d like to dig a bit deeper on these two panels to encourage EDACafe reader to attend them and also mention a third of possible interest to verification engineers. As a member of this year’s DAC Pavilion Panel Committee, I have a vested interest in seeing a great turnout. The two panels are:
Although DAC has distinct committees for pavilion and technical panels, in practice these two groups work closely together to ensure a strong overall program. The two verification panels above were carefully coordinated so that they address complementary aspects of the “crisis” in which verification is taking up an ever-larger percentage of chip and system development time.
The pavilion panel, which I organized, is intended to focus on non-technical solutions for verification. For example, some companies have created a central verification organization that services all projects rather than each project team containing its verification group. Which way works best? Can designers play an effective role in verification? What about system architects working on virtual prototypes? I expect that this panel will address these and other questions. The technical panel is complementary in that the panelists will present proposed and emerging technologies that may help ease the verification crisis. There is a growing sense in the industry that all we’ve done in the last dozen years is take the constrained-random approach pioneered by Verisity and port it to different languages under an ever-growing list of acronyms (eRM, RVM, VMM, AVM, URM, OVM, UVM, etc.) This panel considers new directions that may disrupt the established ways of approaching verification. As you can see, the participants in these two panels reads like a “Who’s Who” in verification, spanning leading-edge product developers, EDA companies, universities, and journalism. I’ll put in a special plus for Breker’s founder and CEO, Adnan Hamid, a true visionary who appears on the technical panel.The third panel relevant to this post is:
Although broader in scope, this panel includes a significant focus on verification since so much of today’s flow is based on metrics that require analysis for deeper understanding. In addition, the verification process is infamous for producing huge amounts of data; the panelists are likely to suggest how analytics can help tackle this challenge. I expect that this will be a DAC with plenty of fun and information, with these panels a big part of both. Please join if you can, and I’ll see you all in Austin! Tom A. The truth is out there … sometimes it’s in a blog. Tags: Breker, Breker functional verification SoC verification Trek TrekSoC, dac, functional verification, SoC verification Warning: Undefined variable $user_ID in /www/www10/htdocs/blogs/wp-content/themes/ibs_default/comments.php on line 83 You must be logged in to post a comment. |