In a groundbreaking keynote at the GTC conference, NVIDIA’s CEO, Jensen Huang, unveiled a vision of the future sculpted by artificial intelligence (AI) and accelerated computing. Central to this vision was the introduction of NVIDIA’s latest chip design, a marvel of engineering set to redefine the boundaries of AI capabilities. This announcement was complemented by strategic partnerships with industry behemoths such as Cadence, Ansys, Synopsys, and Siemens, heralding a new era of technological synergy aimed at accelerating innovation across various sectors.
By Mohamed Awad, SVP and GM of the Infrastructure Business, Arm
News Highlights
Announcing two new Arm Neoverse Compute Subsystems (CSS) built on brand new third generation Neoverse IP:
Arm Neoverse CSS V3, the first Neoverse CSS product for the high-performance V-series portfolio with a 50% performance-per-socket improvement over CSS N2
Arm Neoverse CSS N3, an extension of our leading N-series CSS roadmap, delivering 20% higher performance-per-watt compared to CSS N2
Arm Total Design ecosystem grows to more than 20 members in just four months, and is delivering SoC and chiplet designs across three leading foundries
Arm has built the world’s most pervasive compute architecture and we’ve led many of the technology revolutions that impact the day-to-day lives of people everywhere.
It’s amazing to think that right now, we are doing it again.
From the smallest sensor to the largest data center, the world is embracing AI. Whether it is happening in education, employment, manufacturing, healthcare or transportation – AI is happening on Arm.
Within infrastructure, commodity general-purpose CPUs are no longer sufficient. We are seeing technology giants like AWS, Microsoft and NVIDIA re-design and optimize their entire stack, from silicon to software and systems, to meet the performance, efficiency and ultimately TCO requirements of this demanding new workload.
During the last week of February, the DoubleTree hotel in San Jose, California will once again host DVCon U.S. Dennis Brophy, this year’s General Chair, refers to DVCon U.S. as being “bigger and better”. How much longer the conference can squeeze into these premises is a challenging topic for Accellera Systems Initiative, the conference sponsor since the turn of the century.
Dennis remembers the humble beginnings of this event in 1988. To disguise his age or maybe to underlie his seniority he claims not to remember attending it, but I know he was there. Much has happened since then in our industry, and much has changed. DVCon has changed and grown with the industry and it is now a truly world-wide institution with conferences occurring also in Europe, India, and China.
DVCon has followed closely the changing realities of the electronics industry. From a place to learn about new Hardware Description Languages to one where you can attend a session about Big Data and autonomous automobiles, for example. From just three workshops presented by the leading companies in EDA to an entire day of workshops that will parallel the tutorial sessions. But let me go in order. (more…)
2011 was the year of the foundry (TSMC, Globalfoundries, Samsung) at DAC in San Diego. The foundries had bigger booths, bigger events, were on more panel sessions, and had more marketing influence than any other year that I can remember.
The attendance numbers from EDAC suggest a modest increase in EDA vendors and total attendees for 2011 compared to 2010, ironically the EDAC web site doesn’t even have their own Press Release posted yet after 8 days (did you all go on vacation after DAC?).
Let’s say that you were interested to see and contribute to the list of all known EDA mergers and acquisitions since 1985, there’s a Wiki page just for that. Read it, contribute to it, tell your EDA colleagues about it.
Mentor Graphics has a Wiki page just about their history since 1982, it’s a fun place to reminisce and then add your thoughts.
There’s nothing else quite like SemiWiki and we hope to see you visit and register today.
PAVILION PANEL Hot and SPICEy: Users Review Different Flavors of SPICE and Fast SPICE
Topic Area: Analog/Mixed-Signal/RF Design
Tuesday, June 15, 2010
Time: 4:30 PM — 5:15 PM
Location: Booth #694
Summary:
Are you one of the 20,000 analog and mixed-signal designers stuck waiting for your SPICE simulation run to complete today? Inexpensive multi-core hardware, multi-threaded software, and new algorithms promise to deliver SPICE accuracy 10- to 100-times faster than earlier methods. The panelists have evaluated the new generation of fast SPICE products and will discuss the trad-eoffs of each approach from a users’ perspective.
I thought this would be a great topic for a panel discussion at DAC and will be moderating a panel session in the Pavilion on Tuesday, June 15th at 4:30PM.
Fellow EDA blogger 
Mentor Graphics has a 
