IP Showcase 
Peggy Aycinena
Peggy Aycinena is a contributing editor for EDACafe.Com UltraSoC: Sangiovanni-Vincentelli now leads BoardNovember 2nd, 2017 by Peggy Aycinena
UltraSoC CEO Rupert Baines was also on the conference call, dialing in from the UK, while I was in Silicon Valley. The conversation began with a discussion of Sangiovanni-Vincentelli’s ongoing research work in Singapore. Three sentences, four geographies: What more proof is needed that the semiconductor industry is indeed global?
Peggy: How are things going? Alberto: Excellent, everything is going quite well. Lately, I have been more involved in system-level design, for autonomous driving systems and energy saving in buildings. And I’ve been spending a lot of time in Singapore, dealing with energy savings in the tropics. U.C. Berkeley has a large program with Singapore. This year I spent 8 months there, and next year I expect to be there for 6 months. Peggy: That is a lot of frequent flier miles. Alberto: [laughing] Yes, it is. The point is: The government of Singapore is very concerned about the consumption of natural resources. About 6 years ago, they started a conversation with Berkeley about energy and energy conservation. Since we have a very strong program in that domain, we are now part of the CREATE entity in Singapore. We do not teach there, we do research. CREATE [Campus for Research Excellence and Technological Enterprise] is a very nice structure the Singapore government put together. The entity includes an MIT and a U.C. Berkeley ‘campus’, and researchers from the Technical University of of Munich, ETH in Zurich, Hebrew University of Jerusalem, Shanghai Jiao Tong University, and Cambridge University. Each one of these universities has one or more floors in the CREATE building in Singapore – the amount of space according to the dimension of the research – and all of us are being asked to contribute to the innovation landscape of Singapore. Peggy: With all that, why UltraSoC and why now? Alberto: For ages, I have been involved in tools for design. Part of my work has been in automotive, and I came to the conclusion that safety and security are the most important issues to be resolved – particularly with respect to autonomous driving cars. I was involved in an Italian company, which worked in safety and tools for ISO 26262 compliance. It was purchased last year by Intel, so I was looking for other opportunities, looking at what is available and what would be a step forward. Together with my former student, Alvise Bonivento, a partner in Atlante Ventures in Italy, we found UltraSoC to be a very interesting opportunity. The company is doing something important in security, and their IP will be absolutely important in that area. I have even invested my own money in it. At the beginning, I was involved as an outside observer of the UltraSoC Board. Then I came to Cambridge a couple of months ago, looked at their technical details, and helped form a strategy for the company for the next few years. Low and behold, Rupert, the investors, and the Board of Directors decided what I was doing was valuable and offered me the position as Chairman of the Board. I gladly accepted, because I strongly believe in the company, particularly the flexibility you can add to their IP. It is debugging IP to put it into a chip, that can recall what is going on in the chip and send that [data] out to the designer who can then debug the design. If you look at safety and ISO 26262, it requires full visibility at the chip level. If you have IP for debugging at the chip level, you can be assured the chip is working correctly. Also look at the security issue. Security is about intrusion from an enemy, an intrusion that means something doesn’t work as expected. At the software level, the intruder can disable [functionality]. For instance, you can disable the anti-virus software and penetrate deeper into the structure of the personal computer. But if you are IP embedded into the [hardware of the] computer itself, it’s almost impossible to break. It’s called bare-metal security and is very important – especially in the embedded, automotive, and airplane worlds. If chips for those [markets] have embedded IP that can observe what is going on at the chip level, that will provide a stronger defense against attacks and ensure compliance with the ISO 26262 standard. Peggy: Rupert, how did you get involved with the company? Rupert: I was brought in by the investors two years ago. The company at the time had developed great technology. I joined to help bring it to market and drive the commercial growth, which we are doing really well. Peggy: A semantic detail, Alberto, but what is a non-Executive Chairman? Alberto: An Executive Chairman participates in the daily running of the company. A non-Executive Chairman is a role limited to management of the board, and is a very important role. The role of non-Executive Chairman is perfect for me, because the chairman should not also be CEO. He is connected to the CEO, while watching the operation of the company and advising on strategic issues. Peggy: Do you have time conflicts with all of this, given your involvements in Singapore? Alberto: Not really. My commitment to UltraSoC is about one day a week, and can be done remotely. Peggy: When will you next be in Singapore? Albert: I will start my next 6 months in Singapore from January to July, although I was there for 2 weeks in the past month. I have a lot of contacts in various agencies in Singapore. The Energy Market Authority and the Defense Agency have both asked me to look into their operations and evaluate their capabilities, and that is why I continue to go back and forth. Peggy: Speaking of geographies, Rupert, is it helpful for UltraSoC to be based in Cambridge, the home of Arm, which is so closely associated with the IP industry? Rupert: It is helpful to be in Cambridge, because there is so much technical talent in here, although we have just expanded and opened a satellite office in Bristol. However, it doesn’t really matter whether our engineers come from an IDM – our VP of Engineering was at TI – or a fabless company – many employees are ex-Broadcom or Qualcomm – or from another IP company. It is their skills in design that matter. Peggy: Who do you see as the competition for the UltraSoC offering? Rupert: Our prime competitor is in-house designs. Most companies have simple monitoring tools, but without the insight or benefits we offer at the system level. We do overlap with Arm’s CoreSight. In some cases, customers will use both and in other cases, we replace CoreSight. Peggy: Does UltraSoC anticipate their current customers will be able to provide testimonial for the product? Rupert: Yes, and indeed they have done so in various press releases. Movidius [Intel)], HiSilicon/Huaweei, Elvees, Sondrel, Imagination all have, and several others will announce shortly with testimonials. In addition to customers, there are the partners – Netspeed, SiFive, Coadasip, CEVA, Lauterrbach, etc. – who are all publicly working with us. Peggy: UltraSoC is an IP company, Alberto, but you’ve been closely associated with EDA. The two industries are neighbors, but not identical. A change for you? Alberto: Yes, EDA and IP have always been very neighborly. For instance, Synopsys has a very large IP operation, and Cadence has a fairly large IP organization. I am still on the board of Cadence, and participate in discussions there. In my past work, I have spent a great deal of time developing SoC tools, and the developing and integration of IP is very closely related to that work. Peggy: Rupert, does UltraSoC need to work closely with the EDA vendors to integrate their debug IP with the tools from those vendors? Rupert: We supply standard soft IP, so in that sense, no. We do not need to do anything special. However, there are areas we are co-operating more closely with them. And, of course, where they provide IP, then they are a partner — for example, our processor analytics for Cadence Xtensa, or Synopsys ARC. Peggy: Are there good tools for IP integration today, Alberto, or is this still a big gap in the tool chain? Alberto: You can see the glass half empty there, or half full. There are tools that help you develop IP, but what I would like to see is more scientific work behind it. When you are composing an SoC, you don’t want the side effects of two different IPs that are meant to work together, but cause issues. You also want to make sure the timing is well characterized. When it comes to timing, year after year the tools have been considerably improved, both at Cadence and Synopsys, but there is always more to be done. VCC from Cadence was intended to assist with SoC integration, but is also for system-level design. That’s the principle, to make sure the pieces behave as you expect when you put it all together. In comparing software IP or hardware IP: Hardware IP is much more solid, in the sense that you know more, while software IP can do all kinds of crazy things. Insuring compatibility of software modules is much harder than insuring the compatibility of hardware modules. At the software level, it needs much more discipline. Peggy: Is it the responsibility of the IP vendor to provide tools for integrating their IP into a design? Alberto: The responsibility of the IP vendor is to be sure the IP is reusable. This requires full characterization, and making sure that the IP is fully verified and works as expected. This also imposes a great deal more discipline on the IP vendors. If they look out into an ecosystem where the different IP comes together, the interfaces are important. All of this is part of the discussions at UltraSoC. They are very concerned about the compatibility issue within the design. Their IP is just observing, and should not impact the function of the chip. For example, a DSP combined with a microprocessor — making them work together is much more difficult than integrating IP from UltraSoC into a design. Peggy: Okay, enough about the technology. There is only one question of real importance here. In all of your travels, Alberto, where is the best food to be found? Italy? Singapore? The UK? Silicon Valley? Alberto: [laughing] Let’s change the subject. Rupert: That’s very politic of you, Alberto. Alberto: Actually, you can have a perfectly good dinner in the UK, but the issue is price versus performance. Rupert: [laughing] I have already suggested that all of our future board meetings should be held in Italy. Alberto: Yes, everyone is in favor of that. Peggy: Alberto, are you ever in Berkeley these days? Alberto: Absolutely! I just came there this past week. And when I am in Singapore, I am in Berkeley because we are part of the CREATE program. [laughing] Please tell Berkeley, I am not just goofing off when I am in Singapore. Peggy: And how is the food in Singapore? Alberto: It’s also okay, but there is still a price-performance issue. And you can spend a month’s salary on a good meal, so I would rather cook at home. Although, there are some excellent Italian restaurants in Singapore. Peggy: I remember when I visited your home in Berkeley some years ago, Alberto, you made a great cappuccino. Do you bring your espresso machine with you when you go to Singapore? Alberto: [laughing] The Technical University of Munich has an excellent coffee machine in Singapore, and we work closely with them. A lot of important conversation goes on standing at their machine.
Rupert Baines addresses multiple issues related to UltraSoC, including RISC-V, in this 15 June 2017 blog post. ****************** UltraSoC announced that Professor Alberto Sangiovanni-Vincentelli has joined the company as Non-Executive Chairman, bringing the benefits of his significant experience in the electronics design industry. The appointment comes as UltraSoC drives accelerating adoption of its IP for debug during chip design, and of its embedded intelligent analytics capabilities for monitoring wider system performance on all processor platforms: in particular the open-source RISC-V architecture. UltraSoC’s technology is now enhancing safety, security and power for system design, in applications including automotive, enterprise IT, and the IoT. Sangiovanni-Vincentelli, an electronics industry luminary, joined the company’s Strategic Advisory Board in June of this year. It was immediately clear to the Board that UltraSoC could benefit significantly from his experience and his vision for the system-wide potential for the company’s technology. Sangiovanni-Vincentelli replaces outgoing Chairman, Chris Gilbert, who steps down having served as UltraSoC’s Chairman since January 2014. Sangiovanni-Vincentelli is a major figure in both commercial and technological developments in the electronics industry and brings significant experience of direct relevance to UltraSoC and its applications and development of its technology. In the 1980s, Sangiovanni-Vincentelli helped to found both Cadence Design Systems and Synopsys – the two industry leaders in Electronic Design Automation. He has also fulfilled many advisory roles, ranging from Intel, HP and ST microelectronics in the semiconductor industry to General Motors and UTC in systems. A distinguished academic, Professor Sangiovanni-Vincentelli has been with the Department of Electrical Engineering and Computer Sciences at U.C. Berkeley since 1976. He is also an author of 950 papers, 19 books and 2 patents, and a recipient of numerous academic and industry awards with plaudits referring to his “pioneering contributions to EDA” and “ground-breaking contributions that have had an exceptional impact on the development of electronics and electrical engineering or related fields”. “The industry is now benefitting from the power of embedding UltraSoC IP into systems not only to debug the silicon in development, but to analyze and continually monitor performance, power, safety and security in critical applications,” commented Sangiovanni-Vincentelli. “UltraSoC has made a very strategic move in applying this capability to the growing ecosystem for the RISC-V open-source processor platform, as well as to all standard processor architectures.”> Rupert Baines, UltraSoC CEO, commented: “Chris Gilbert has made a significant contribution to UltraSoC and we are indebted to him for his involvement and excellent support over the last three years. We are excited to welcome Alberto into the Chairman role ,and are convinced that his background as a serial entrepreneur and distinguished academic makes him the ideal choice for guiding UltraSoC’s future growth and direction.” UltraSoC is an independent provider of SoC infrastructure that enables rapid development of embedded systems based on advanced SoC devices. The company is headquartered in Cambridge, United Kingdom. For more information visit [http://www.ultrasoc.com]
Tags: Alberto Sangiovanni-Vincentelli, Atlante Ventures, Cadence, CEVA, Coadasip, Elvees, HiSilicon/Huaweei, Imagination, ISO 26262, Lauterrbach, MIT, Movidius, Netspeed, NRF CREATE, RISC-V, Rupert Baines, SiFive, Singapore, Sondrel, Synopsys, Technical University of Munich, U.C. Berkeley, UltraSoC |
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