Semiconductor design and verification professionals use a variety of languages to model and verify their new ideas in this exciting era of 5G, AI, IoT and autonomous vehicles. Taking a step back, it’s important to understand where these design and verification languages came from, because in the early days of IC and system design there were multiple proprietary languages in circulation. Consider some of the following early languages and simulators used to describe and simulate IC designs:
- Tegas Design Language (Tegas, 1972)
- ABEL (Data I/O, 1983)
- MOSSIM (California Institute of Technology, 1984)
- Verilog (Gateway Design Automation, 1985)
- LSim (Silicon Design Labs, 1986)
- COSMOS (1987)
- IRSIM (1989)
- TRANALYZE (1991)
Starting in the 1980s, we began to see two simulation languages take hold commercially: VHDL and Verilog. As the industry adopted standard languages, the task of moving your ASIC design from one foundry to another became much easier, especially as logic synthesis tools like Design Compiler from Synopsys were gradually adopted.
