Last week at the RISC-V Summit in Santa Clara, NVIDIA’s Vice President of Multimedia Architecture/ASIC, Frans Sijstermans, took to the stage to recount NVIDIA’s strategic transformation. For an audience of engineers, developers, and industry insiders, Sijstermans’ keynote was both an inside look at NVIDIA’s journey with RISC-V and a demonstration of how open architecture has fueled rapid technological growth. Over the past seven years, NVIDIA’s adoption of RISC-V has marked a major shift in its approach to microprocessor design, from the niche Falcon core to a globally scaled RISC-V integration that now spans billions of cores.
From Falcon to RISC-V: A Strategic Leap
In 2017, Sijstermans first announced NVIDIA’s plan to phase out Falcon, their proprietary 32-bit microprocessor, and adopt RISC-V. At the time, Falcon had been used for a decade, embedded across various applications. But as computing demands grew more complex, NVIDIA recognized the need for a more adaptable, extensible architecture. After evaluating multiple architectures, the company found RISC-V’s open, customizable foundation aligned with its goals for scalability, security, and performance.
“Customization is really the key here,” Sijstermans emphasized. “As Moore’s Law slows, it becomes increasingly important to use every bit of silicon effectively. RISC-V’s customizable structure allows us to design specific extensions for our applications.” This customization became one of RISC-V’s most appealing attributes for NVIDIA, which has since been able to innovate rapidly within the flexible framework the architecture provides.
