Not surprisingly, Samsung Foundry’s recent event confirmed at least two of the trends also recently highlighted by TSMC: the adoption of backside power delivery and the development of technologies that make it possible to place an electric chip and an optical chip in the same package. A frivolous remark on process naming: contrary to Intel Foundry and TSMC, Samsung has not switched to the Angstrom unit and prefers using tenths of a nanometer, with a point (SF1.4). Probably the most surprising announcement this week comes from a Finnish startup, claiming that it can boosts the performance of any existing multicore CPU up to 100-fold. An obvious question comes to mind: why haven’t the leading CPU vendors of the world come up with a similar solution yet? We’ll try to find out as soon as we can.

Roadmap updates from the U.S. Samsung Foundry Forum

At the recent U.S. Samsung Foundry Forum, the South Korean company announced two new process nodes, SF2Z and SF4U. The company’s latest 2-nanometer process, SF2Z, incorporates optimized backside power delivery network (BSPDN) technology, enhancing PPA compared to SF2 and reducing voltage drop. Mass production of SF2Z is slated for 2027. SF4U is described as a “high-value” 4-nanometer variant that offers PPA improvements by incorporating optical shrink, with mass production scheduled for 2025. Samsung also reaffirmed that its preparations for SF1.4 (1.4-nanometer) are progressing smoothly, with performance and yield targets on track for mass production in 2027. The company emphasized the maturity of its GAA (gate-all-around) technology, which will be used to mass produce Samsung’s second-generation 3-nanometer process (SF3) in the second half of this year and the upcoming 2-nanometer process. Another highlight was the unveiling of Samsung AI Solutions, a turnkey AI platform resulting from collaborative efforts across the company’s Foundry, Memory and Advanced Package businesses, enabling a 20% improvement in total turnaround time. The company is also planning to introduce integrated, co-packaged optics (CPO) technology.

Credit: Samsung Foundry

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Let’s start with just a quick mention of a remarkable event in the IT world: at its recent Worldwide Developers Conference, Apple unveiled its long-awaited artificial intelligence strategy. Details of the AI innovations introduced by Apple – with a special focus on users’ privacy – can be found here. The Cupertino announcements, however, failed to impress the financial community, and Apple shares reportedly closed down nearly 2% after the event. Let’s now move to this week’s news roundup, which includes some pre-announcements concerning products that will be on display at the upcoming Design Automation Conference.

Sigasi’s shift-left approach to HDL validation

Sigasi has announced its new Visual HDL (SVH) product line, an integrated development environment that – according to the company – is able to take advantage of the shift-left methodology and give hardware designers and verification engineers better insight during the design progress. SVH enables them to manage HDL specifications by validating code early in the design flow, well before simulation and synthesis flows. SVH is fully integrated with Microsoft’s Visual Studio Code; lets users move through hierarchy views and graphics that update instantaneously as they make changes in their code; and flags problems while users enter HDL code. Starting with syntax and semantics, SVH enforces coding styles as recommended by safety standards such as DO-254 or ISO 26262 and catches UVM abuses. The new IDE comprises a tiered portfolio, offering a Designer Edition, a Professional Edition, an Enterprise Edition, and a Community Edition for non-commercial uses.

Real Intent’s tool for RTL security sign-off

Real Intent has announced Sentry, a hardware security static sign-off tool to protect designs against potential security vulnerabilities. The tool allows designers and security architects to incorporate hardware security sign-off early, as part of the RTL design process. According to the company, Sentry enables early hardware security sign-off at scale – supporting a hundred million gates with fast runtimes. Sentry analyzes data movement within the hardware, ensuring all paths adhere to stringent security protocols. In a single run, the tool performs path verifications simultaneously across multiple security specifications, such as data integrity (verifying that secure data transfers between protected domains without any corruption or unauthorized access), leakage prevention (ensuring sensitive data cannot reach unauthorized domains where it could be compromised) an interference safeguarding (stopping unauthorized data from reaching and interfering with secure domains).

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Some of this weeks’ news updates are coming from Computex, Taiwan’s computer expo, which this year offered speeches from a lineup of semiconductor CEOs including AMD’s Lisa Su, Nvidia’s Jensen Huang, Intel’s Pat Gelsinger, Arm’s Rene Haas, and Qualcomm’s Cristiano Amon. While Computex isn’t the only thriving show in the IT world – just think of CES or MWC – it’s interesting to notice that its American and European counterparts died years ago. Las Vegas’ Comdex was held only until 2003; Hanover’s CeBit survived until 2018.

Ansys simplifies cloud-based simulation on Azure

Ansys has launched “Ansys Access on Microsoft Azure” to enable seamless deployment of pre-configured Ansys products on Azure cloud platform infrastructure. According to the company, Ansys’ customers using their own Azure subscription with existing Ansys licenses can now benefit from a more scalable, secure, and cost-effective approach to running HPC simulations in the cloud.

As Ansys explained in a press release, there are many challenges that need to be addressed when using simulation in the cloud. These include validating on-premises workloads that have been shifted to the cloud, the ongoing work to deploy and test new virtual machines and configuring adjacent cloud-based infrastructure in a cost-effective manner. “Ansys Access on Azure” addresses these challenges by delivering pre-tested and configured Ansys applications updated with each major release and aligned to a curated set of recommended VMs and HPC infrastructure. According to Ansys, this simplifies implementation for IT departments, giving them better control over cost.

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