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 EDACafe Editorial
Roberto Frazzoli
Roberto Frazzoli
Roberto Frazzoli is a contributing editor to EDACafe. His interests as a technology journalist focus on the semiconductor ecosystem in all its aspects. Roberto started covering electronics in 1987. His weekly contribution to EDACafe started in early 2019.

New EDA releases; Intel’s FPGA unit to become a standalone business; TSMC’s 3Dblox 2.0

 
October 6th, 2023 by Roberto Frazzoli

OpenAI, the company behind ChatGPT, is reportedly exploring making its own artificial intelligence chips, possibly through the acquisition of an AI chip company. According to a Reuters report, OpenAI aims to gain independence from expensive Nvidia GPUs.

New EDA releases: Keysight, Nullspace, Mathworks

Keysight EDA 2024 software suite offers three major “shift left” updates. “RF System Explorer” streamlines system and circuit level design workflows for early exploration of system architectures in Advanced Design System; “Digital Pre-Distortion Explorer” and “Digital Pre-Distortion Designer” accelerate wide bandgap power amplifier design and validation using the Dynamic Gain Model; “SystemVue” delivers complete Satcom modeling and simulation solutions for 5G non-terrestrial network, DVB-S2X, and phased array product development.

Nullspace has launched the Nullspace Prep and Nullspace EM 2023.9 release, claiming a 2-4x simulation speed improvement for large problems. The company is also releasing the Nullspace EM Solver on the Windows platform; up until now, the product was only available on Linux. Users interested in the Windows version can apply to take part in a Beta program. Additionally, Nullspace has authored a new whitepaper, “Overcoming Limitations of 3D EM Simulation of Electrically Large Devices.”

MathWorks has unveiled Release 2023b (R2023b) of the MATLAB and Simulink product families. R2023b introduces two new products. “Simulink Fault Analyzer” enables systematic fault effect and safety analysis using simulation. The new product performs fault injection simulations without modifying engineering designs. Engineers time or trigger faults by specific system conditions and can perform safety analyses, such as Failure Mode and Effects Analysis (FMEA), while leveraging simulation. “Polyspace Test” empowers engineers to develop, manage, and execute C and C++ code tests in embedded systems. Users can create stubs and mocks to isolate and verify components under test using the Polyspace xUnit API or a graphical test authoring editor. Polyspace Test also lets engineers execute tests on host computers or embedded targets, automate test execution, and link tests to requirements for traceability. R2023b also includes major updates to popular MATLAB and Simulink tools.

Intel’s FPGA unit to become a standalone business

Intel has announced its intent to separate its Programmable Solutions Group (PSG) operations – the company’s FPGA unit – into a standalone business. As stated in a press release, with this move Intel aims to give PSG the autonomy and flexibility it needs to fully accelerate its growth and more effectively compete in the FPGA industry, while allowing Intel product teams to focus on their core business and long-term strategy. Standalone operations for PSG are expected to begin Jan. 1, 2024. Over the next two to three years, Intel intends to conduct an IPO for PSG and may explore opportunities with private investors to accelerate the business’s growth, with Intel retaining a majority stake. Chief executive officer of the new standalone business will be Sandra Rivera, executive vice president at Intel. PSG and Intel “will remain strategically aligned,” including continuing PSG’s relationship with Intel Foundry Services. During a conference call with investors, Rivera reportedly said the unit is increasingly using Intel’s fabs rather than the foundries in Taiwan. The PSG announcement follows other similar moves from Intel, aimed at focusing the company on Pat Gelsinger’s strategy: the IPO for the Mobileye business in 2022, and the investments by Bain Capital and TSMC into Intel’s IMS Nanofabrication subsidiary. The PSG group was born as a result of Intel’s acquisition of Altera in 2015 for $16.7 billion.

Recent news from Intel include the arrival of Intel 4 technology, which uses extreme ultraviolet lithography, and the first use of EUV in high-volume manufacturing in Europe – specifically, at Intel’s new fab in Leixlip, Ireland. According to the company, this production milestone is another proof point that Intel is executing on its plan to deliver five process nodes in four years and to usher in a new generation of leadership products. Intel’s investments in Ireland, along with existing and planned investments in Germany and Poland, create a complete semiconductor manufacturing value chain in Europe.

TSMC announces the 3Dblox 2.0 open standard

TSMC has announced the new 3Dblox 2.0 open standard and major achievements of its Open Innovation Platform (OIP) 3DFabric Alliance. Introduced last year, the 3Dblox open standard aims to modularize and streamline 3D IC design solutions. The new 3Dblox 2.0 enables 3D architecture exploration with an innovative early design solution for power and thermal feasibility studies. The designer can now, for the first time in the industry, put together power domain specifications and 3D physical constructs in a holistic environment and simulate power and thermal for the whole 3D system. 3Dblox 2.0 also supports chiplet design reuse features such as chiplet mirroring to further improve design productivity. 3Dblox 2.0 is supported by major EDA vendors. TSMC also launched the 3Dblox Committee, organized as an independent standard group, with the goal to create an industry-wide specification that enables system design with chiplets from any vendors. Working with key members including Ansys, Cadence, Siemens, and Synopsys, the committee has ten technical groups of different subjects and proposes enhancements to the specs and maintain the interoperability of EDA tools. Designers can now download the latest 3Dblox specifications from the 3dblox.org website and find more information about 3Dblox and its tool implementation by EDA partners. TSMC’s 3DFabric Alliance has grown significantly over the past year, and now includes twenty-one partners. Collaboration areas include memory, substrates and testing.

Acquisitions

Infineon has acquired the Zurich-based startup 3db Access, a specialist in secured low power Ultra-Wideband (UWB) technology and an IP provider for major automotive brands. The acquisition adds to Infineon’s portfolio for secured smart access, precise localization and enhanced sensing. The first set of IoT use cases which can take advantage of 3db’s technology include secured access and authentication, accurate location tracking and indoor navigation, as well as presence detection utilizing UWB radar implementations.

French IT services and consulting group Capgemini has acquired HDL Design House, an independent provider of silicon design and verification services in Europe. Founded in 2001 and headquartered in Belgrade (Serbia), HDL Design House comprises approximately 300 engineers.

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