Samsung Foundry EDA tool certifications; AMD’s new emulation FPGA; AMD gaining ground in AI training

Reportedly, the latest update on the U.S.-China tech fight is China’s decision to place exports restriction on gallium and germanium, which – according to some observers – could be followed by restrictions on rare earth exports. As for semiconductor subsidies updates, Broadcom will reportedly invest in a European Union-funded program in Spain which would include the construction of “large-scale back-end semiconductors facilities unique in Europe.” And French research institute CEA will receive funding from the French government for the construction of a new fab in Grenoble with the goal of downscaling FD-SOI (fully depleted silicon on insulator) chips below 10-nanometer and a to develop a new generation non-volatile onboard memory.

Samsung Foundry roadmap updates

On occasion of its recent Samsung Foundry Forum in San Jose, the South Korean company announced it will begin mass production of the 2-nanometer process for mobile applications in 2025, and then expand to HPC in 2026 and automotive in 2027. Mass production of SF1.4 will begin in 2027 as planned. From 2025, Samsung will begin foundry services for 8-inch gallium nitride power semiconductors. The 5-nanometer radio frequency process is also under development and will be available in the first half of 2025. Samsung Foundry is adding new manufacturing lines in Pyeongtaek, South Korea, and Taylor, Texas. The company said the construction of the new fab in Taylor is proceeding according to initial plans and is expected to finish by the end of the year, beginning operation in the second half of 2024. Among other news, Samsung is launching its ‘Multi-Die Integration Alliance’ in collaboration with partner companies and players in memory, substrate packaging, and testing. The MDI Alliance aims to create a packaging technology ecosystem for 2.5D and 3D heterogeneous integration.

Samsung Foundry certifications of EDA tools

Here’s a brief summary of some of the latest certifications granted by Samsung Foundry to the four major EDA vendors, announced on occasion of Samsung Advanced Foundry Ecosystem (SAFE) Forum North America 2023.

Ansys. RedHawk-SC and Totem power integrity signoff solutions are now certified for Samsung’s latest 2-nanometer silicon process technology. RedHawk power integrity and thermal verification platform are now certified for Samsung’s family of heterogeneous multi-die packaging technologies, which include a range of 2.5D packaging options (I-Cube and H-Cube) as well as 3D vertical stacking with X-Cube technology.

Cadence. The AI-based Virtuoso Studio design tools and solutions have been certified by Samsung Foundry down to its SF2 process. Cadence digital and custom/analog flows have achieved certification for Samsung Foundry’s SF2 and SF3 process technologies. Cadence has also expanded its collaboration with Samsung Foundry on 3D-IC design, with the delivery of the latest reference flows and corresponding package design kits based on the Cadence Integrity 3D-IC platform – which supports Samsung’s new 3D CODE standard, a new system description language. Additionally, Cadence has delivered a complete, certified backside implementation flow (for routing on the wafer backside) to support Samsung Foundry’s SF2 process node. Among the functions optimized for backside routing, Innovus GigaPlace engine automatically places and legalizes a ‘nano through silicon via’ structure to connect frontside and backside layers; Innovus GigaOpt engine uses backside layers for timing-critical long wires; Innovus NanoRoute engine supports backside routing based on rules in the technology’s Library Exchange Format. Lastly, Cadence has announced a certified node-to-node design migration flow for analog IP based on the new generative AI-powered Cadence Virtuoso Studio. The flow is compatible with Samsung Foundry’s advanced nodes.

Siemens. The Calibre nmPlatform software for IC verification sign-off is now fully certified for Samsung Foundry’s latest 3-nanometer process technologies, and enablement activities for Samsung Foundry’s 2-nanometer process are currently underway. Calibre xACT software now support Samsung’s second-generation gate-all-around transistors with a combination of field solver and table-based techniques for parasitic extraction flows. The Analog FastSPICE platform is now certified across Samsung Foundry’s FinFET, EUV and GAA fabrication processes, namely 14LPP, 14LPU, 11LPP, 8LPP, SF4, SF4P, SF3 and SF3P. Analog FastSPICE is also qualified for Samsung Foundry’s FD-SOI 18FDS process technology. The Aprisa solution is now qualified for Samsung Foundry’s 5-nanometer process technologies. Lastly, Siemens and Samsung have successfully demonstrated a consolidated Design-for-Test flow using Siemens’ Tessent Multi-die software for 3D IC designs.

Synopsys. In collaboration with Samsung, the company will develop optimized digital and custom design flows on Samsung Foundry’s SF2 process. The two companies are also deepening their collaboration on the design of 2.5D and 3D multi-die systems on Samsung’s most advanced process technologies. Synopsys 3DIC Compiler supports Samsung’s new 3D CODE standard. Lastly, Ansys and Synopsys have developed a new reference flow for radio-frequency IC design developed with Samsung Foundry for its 14LPU process technology.

AMD’s 18.5M logic cells FPGA targets emulation and prototyping

AMD has announced the Versal Premium VP1902 adaptive system-on-chip, what it claims is the world’s largest FPGA-based adaptive SoC. The VP1902 is an emulation-class, chiplet-based device designed to streamline the verification of increasingly complex semiconductor designs, offering 2X the capacity compared to the previous generation (Xilinx) Virtex UltraScale+ VU19P FPGA. The VP1902 leverages the Versal architecture, including the programmable network-on-chip, and – according to AMD – can provide up to 8X faster debugging compared to the prior generation VU19P FPGA.

AMD’s MI250 a viable alternative to Nvidia chips?

According to San Francisco-headquartered MosaicML, the AMD MI250 datacenter accelerator is a viable alternative to Nvidia chips for machine learning training hardware. The AMD chip satisfied MosaicML’s requirements in terms of performance on real workloads, cost and minimal code changes. MosaicML also praised AMD’s software advances, a key issue for developing AI applications. All details in this blog post.

And, speaking of ML performance comparisons, MLCommons has recently announced new results from two industry-standard MLPerf benchmark suites: Training v3.0, and Tiny v1.1.

Lightelligence’s Optical Network-on-Chip processor

Boston-headquartered Lightelligence has launched Hummingbird, what it claims is the world’s first Optical Network-on-Chip (oNOC) processor designed for domain-specific artificial intelligence workloads. Hummingbird utilizes advanced vertically stacked packaging technologies to integrate a photonic chip and an electronic chip into one single package. In oNOC, power and latency are virtually unaffected by distance, enabling new and more robust topologies that do not rely on nearest neighbor communication. In Hummingbird, Lightelligence implemented a low-latency optical all-to-all broadcast network spanning 64 cores, with 64 transmitters and 512 receivers. The device is integrated into a PCIe form factor.

Oracle Database ported to Ampere processors

Oracle Database now runs on Ampere’s ‘Cloud Native Processors’ in either the cloud or on-prem servers. “The importance of this cannot be overstated. This is the first porting of the [Oracle] database to a new hardware architecture in several decades,” said the Santa Clara-based company in a blog post.

Acquisitions

Keysight has announced its intention to acquire the entire share capital of France-based ESI Group, a provider of virtual prototyping solutions in automotive and aerospace end markets.

General Motors has acquired all the assets of Israel-based battery software startup ALGOLiON. The company has developed software that uses data streams from EV battery management systems to help identify anomalies in cell performance to provide early detection of battery hazards including thermal runaway propagation events.

This entry was posted on Friday, July 7th, 2023 at 4:02 am. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.