RF EDA updates; Samsung Foundry-IP vendors agreements; AMD’s AI products and strategy; Intel planning new EMEA facilities

In view of its upcoming IPO, Arm is reportedly looking for some “anchor investors” among its main customers and end users. Companies in talks with Arm include Intel, Alphabet, Apple, Microsoft, TSMC, and Samsung. Let’s now move to this week’s news roundup, which mostly concerns EDA and IP. Among the other news, AMD disclosing details about its artificial intelligence products and strategy.

RF EDA updates: Keysight, Xpeedic

Keysight has introduced a new release of its PathWave Advanced Design System. The ADS 2024 suite offers new millimeter wave and subterahertz frequency capabilities targeting 5G and future 6G chips. According to Keysight, 3D electromagnetic analysis can be accelerated thanks to next-generation solvers, application-aware meshing algorithms, and an innovative circuit co-design and simulation approach. Increased circuit designer productivity is achieved through enhancements to the RFPro tool, which streamlines monolithic microwave integrated circuit and module workflows. Performance for microwave power amplifier designs can also be improved thanks to electrothermal simulation, signal modulation, and analysis capabilities. Xpeedic, too, has recently unveiled a new edition of its RF EDA solution. Innovations concern XDS, Xpeedic’s RF system-level design and simulation platform; IRIS, its on-chip passive modeling and simulation tool; and iModeler, a passive model generation tool.

Samsung Foundry expands agreements with major IP vendors

Samsung Foundry has recently signed IP agreements with Cadence, Synopsys and Alphawave. The multi-year agreement with Cadence will expand the availability of Cadence’s design IP portfolio on Samsung Foundry’s SF5A process technology, the latest 5-nanometer process variant to support automotive applications. The IP offer will include 112/56/25/10G PHY/MAC, PCI Express 6.0/5.0/4.0/3.1 PHY/controller, Universal Chiplet Interconnect Express PHY/controller, USB3.x PHY/controller and a complete PHY and controller offering for GDDR6 and DDR5/4. The agreement also encompasses the enablement of the latest DDR5 8400+ and GDDR7 solutions on Samsung Foundry’s advanced SF3 technology. The expanded agreement with Synopsys concerns the development of a broad portfolio of IP for automotive, mobile, high-performance computing and multi-die designs. The expanded Synopsys IP offering will target Samsung’s 8LPU, SF5, SF4 and SF3 processes and will include foundation IP, USB, PCI Express, 112G Ethernet, UCIe, LPDDR, DDR, MIPI and more. In addition, Synopsys will optimize IP for Samsung’s SF5A and SF4A automotive process nodes to meet Grade 1 or Grade 2 temperature and AEC-Q100 reliability requirements. The auto-grade IP for ADAS SoCs will include design failure mode and effect analysis (DFMEA) reports. The agreement with Alphawave has been expanded to include the 3-nanometer process node. The new IP offering includes 112 Gbps Ethernet and PCI Express Gen6/CXL 3.0 interfaces.

Siemens integrates supply chain intelligence with PCB design tool

Siemens Digital Industries Software is integrating the Supplyframe supply chain intelligence platform with its Siemens Xcelerator portfolio of software and services, starting with Xpedition software for PCB design. According to the company, the integrated solution facilitates supply chain resilience by providing real-time visibility into global component availability, demand, cost, compliance and associated parametric data at the point of design. The Supplyframe Design-to-Source Intelligence platform includes global real-time availability and lead times for over 600M component parts, and captures billions of data signals about part supply, demand, risk and commercial intent.

New IP responds to voltage droop

Movellus has announced what it claims is the “industry-first integrated droop response system,” an off-the-shelf synthesizable IP designed to simultaneously address the challenges of voltage droop and enable fine-grained DVFS capability. In addition to detecting and responding to voltage droops, the solution – called Aeonic Generate AWM2 – incorporates monitoring and observability features that will provide insight to silicon health and lifecycle management systems. As Movellus explained in a press release, voltage droop can happen in systems with a high number of processors going from idle to full-blast computation. The traditional solution to transient supply droop is to over-design, operate at a higher voltage, and even lower performance to protect against catastrophic circuit failures.

AMD announces artificial intelligence products and strategy

At a recent event in San Francisco focused on data center and AI applications, AMD announced new products and provided details about its strategy. Among other things, AMD unveiled a series of updates to its 4th Gen EPYC family, such as the “cloud native” EPYC 97X4 processors, formerly codenamed Bergamo, featuring 128 Zen 4c cores per socket. According to the company, these processors provide the greatest vCPU density and industry leading performance for applications that run in the cloud, and leadership energy efficiency. AMD also introduced 4th Gen EPYC processors equipped with its 3D V-Cache technology, which the company claim is “the world’s highest performance x86 server CPU for technical computing.” As for artificial intelligence, AMD revealed new details of the AMD Instinct MI300 Series accelerator family, including the introduction of the MI300X accelerator, which the company claim is “the world’s most advanced accelerator for generative AI.” The MI300X is based on the AMD CDNA 3 accelerator architecture and supports up to 192 GB of HBM3 memory. A large language models such as Falcon-40, a 40B parameter model, can fit on a single MI300X accelerator. AMD also introduced the Instinct Platform, which brings together eight MI300X accelerators into an industry-standard design for AI inference and training. As shown in this keynote video, AMD’s CEO Lisa Su was joined on stage by executives from Amazon Web Services, Citadel, Hugging Face, Meta, Microsoft Azure and PyTorch. According to a Reuters exclusive report, Amazon Web Services is considering using AMD’s MI300 chips, though it has not made a final decision.

Lockheed Martin-GlobalFoundries collaboration

Lockheed Martin and GlobalFoundries have announced a strategic collaboration which will explore critical needs in semiconductor innovation and secure manufacturing across a range of technologies, including 3D heterogeneous integration, silicon photonics, and gallium nitride on silicon. The companies will also work to develop a chiplet ecosystem. The collaboration aims at boosting the U.S. semiconductor supply chain for mission-critical security systems, in support of the U.S. CHIPS and Science Act.

Intel to build facilities in Israel and Poland

Intel will reportedly spend $25 billion on a new factory in Kiryat Gat, Israel, due to open in 2027. Israeli Prime Minister Benjamin Netanyahu called this “the largest-ever international investment in the country.” In a previous announcement, Intel disclosed it has selected an area near Wrocław, Poland, as the site of a new semiconductor assembly and test facility that should be ready by 2027 and will employ approximately 2,000 people. Intel expects to invest up to $4.6 billion in the facility, which will have the capacity to expand. Design and planning for the facility will begin immediately, with construction to commence pending European Commission approval. Polish prime minister described this as “the largest greenfield investment in the history of Poland.” In Intel plans, the future Poland facility will contribute to the creation of a European semiconductor manufacturing value chain, along with its existing fab in Leixlip, Ireland, and its planned fab in Magdeburg, Germany. As for this latter facility, Intel and the German government are reportedly close to an agreement for the chipmaker to receive 9.9 billion euros ($10.83 billion) in subsidies, up from a previously agreed 6.8 billion.

Crystal oscillators with 25 fs of jitter for frequencies up to 2 GHz

Mixed-Signal Devices has entered the high-performance timing market with the introduction of what it claims is “the industry’s highest performance” family of crystal oscillators. With a typical jitter of only 25 femtoseconds integrated from 12 KHz to 20 MHz, a total stability of ±20 ppm, and with frequencies up to 2 GHz, the MS11xx XOs are targeted at a range of applications including 5G wireless infrastructure, 56G/112G/224G Serdes clocking, 100G/200G/400G/800G OTN and coherent optics, microwave backhaul, and test and measurement.

Further reading

A research team from MIT and other institutions has developed an approach which uses artificial intelligence to drastically reduce the total acquisition time for noninvasive X-ray imaging of nanoscale three-dimensional objects, such as integrated circuits. The AI training process concerns typical patterns found in IC interiors, and the physics of X-ray propagation through the IC. Experiments on a specific IC show that, without loss in quality, the total data acquisition and computation time can be reduced from 68 hours to 38 minutes.

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