EDA record revenues; market uncertainties; TSMC’s 3D initiatives; Siemens acquires Avery

Taiwanese foundry TSMC and its collaboration with major EDA partners make up a large part of this week’s news roundup. Other foundries are in the news as well. But first, a quick look at some market data and investment trends.

EDA record revenues

Record numbers are being reported for the Electronic System Design industry: as announced by the ESD Alliance, revenue increased 17.5% from $3,191.4 million in Q2 2021 to $3,748.7 million in Q2 2022. The four-quarter moving average, which compares the most recent four quarters to the prior four, rose 15.3%. As noted by Wally Rhines, the EDA industry in Q2 2022 posted the highest year-over-year increase in over a decade, and all product categories and geographic regions recorded growth in the quarter.

Fab capex reduction

Several chipmakers, however, are cutting their planned capital expenditure citing weaker consumer demand. Among them Taiwanese foundry UMC, which will reportedly reduce its capex by almost a fifth, and South Korean memory maker SK hynix, which has decided to cut its investment next year by more than 50% YoY, citing an unprecedented deterioration of the market conditions in the semiconductor memory industry as uncertainties in the business environment continue.

“Fully autonomous vehicles at scale are a long way off”

On a longer term, factors of uncertainty may include a further postponement of the fully autonomous vehicle era. Ford and Volkswagen are shutting down their shared self-driving car unit Argo.ai. “We’re optimistic about a future for L4 ADAS, but profitable, fully autonomous vehicles at scale are a long way off and we won’t necessarily have to create that technology ourselves,” said Ford president and CEO Jim Farley in a press release.

TSMC’s 3D IC initiatives: ecosystem, data exchange standard

Let’s try to summarize the many announcements coming from the recent TSMC’s Open Innovation Platform Ecosystem Forum. The 3DFabric Alliance is a newly created ecosystem of companies from different industries (EDA, IP, DCA/VCA, memory, OSAT, substrate, testing) meant to help customers use TSMC’s 3DFabric technologies. As for EDA vendors, initial members of the 3DFabric Alliance include Ansys, Cadence, Siemens and Synopsys. 3DFabric is the name that collectively designates TSMC’s 3D silicon stacking and advanced packaging technologies, covering both frontend, 3D chip stacking or TSMC-SoIC (System on Integrated Chips), and backend technologies such as CoWoS and InFO. 3Dblox is the name of a standard created by TSMC to unify the design ecosystem with qualified EDA tools and flows for its 3DFabric technologies. The modularized standard is designed to model, in one format, the key physical stacking and the logical connectivity information in 3D IC designs, covering physical implementation, timing verification, physical verification, electro-migration IR drop analysis, thermal analysis, and more.

Obviously, the four major EDA vendors have already announced the certification of their products for TSMC 3DBlox standard: Ansys for its RedHawk-SC and Redhawk-SC Electrothermal, Cadence for its Integrity 3D-IC platform, Siemens for its 3DSTACK, Simcenter Flotherm, Calibre combined with Simcenter Flotherm, Synopsys for its 3DIC Compiler.

More TSMC-EDA updates

Besides the 3D-chiplet related initiatives, TSMC and EDA vendors have recently announced more collaborations. Ansys‘ power integrity software has been certified for TSMC’s Finflex architecture as well as for the TSMC N4 process. Cadence has developed a node-to-node design migration flow – from TSMC N5 and N4 to TSMC N3E process technology – built upon its Virtuoso platform for custom/analog IC blocks. Siemens’ Calibre nmPlatform tool for IC physical verification sign-off, as well as Analog FastSPICE platform, are now fully certified for TSMC’s N4P and N3E processes. The Synopsys digital and custom design flows have achieved certification on the TSMC N3E process. Synopsys, Ansys and Keysight have announced the availability of their new millimeter wave radio frequency design flow for TSMC’s 16nm FinFET Compact (16FFC) technology.

Cadence and Samsung Foundry collaborating on 3D-ICs

More news on partnerships concerning 3D ICs include Cadence’s expanded collaboration with Samsung Foundry to accelerate 3D-IC design. The reference flow featuring the Cadence Integrity 3D-IC platform has been enabled to advance Samsung Foundry’s 3D-IC methodology. The innovation is focused on optimizing the PPA of chips stacked in a 3D-IC configuration even in the presence of large 3D structures like TSVs blocking standard cell placement area and routing resources.

Intel Foundry Services’ USMAG Alliance

Intel Foundry Services (IFS) has launched the USMAG (United States Military, Aerospace and Government) Alliance. An addition to IFS’ Accelerator program, the new alliance brings together a trusted design ecosystem with U.S.-based manufacturing for advanced process technologies, to meet the design and production requirements of U.S. national security applications. The initiative builds on IFS’ role in the U.S. Department of Defense Rapid Assured Microelectronics Prototypes – Commercial (RAMP-C) program. USMAG’s initial members include Cadence, Synopsys, Siemens EDA, Intrinsix and Trusted Semiconductor Solutions.

AI updates: Ceremorphic, IBM, Neuchips, Flex Logix, Quadric

Ceremorphic has successfully taped out its first AI supercomputing chip, to be fabricated with a 5-nanometer TSMC process. The company places special emphasis on the reliability requirements of AI processors. IBM has developed its first AI SoC, dubbed AIU (Artificial Intelligence Unit). Built with a 5-nanometer process, the chip features 32 processing cores and contains 23 billion transistors. Each core closely resembles the AI core embedded in the Telum chip that powers the latest IBM’s z16 system. A key feature of IBM’s AI architectures is approximate computing, using a data format with a small number of bits. Neuchips, a specialist in AI ASIC platforms for deep learning recommendation, has announced series B2 funding of $20 million. Funders include a new investor, Taiwan-based Raydium Semiconductor Corporation. Early next year, Flex Logix will start licensing its InferX edge inference technology. Quadric has introduced Chimera, an IP family of general-purpose neural processors (GPNPUs) that blends a neural processing accelerator with the full C++ programmability of a DSP.

Acquisitions

Siemens Digital Industries Software has signed an agreement to acquire Avery Design Systems, a simulation-independent verification IP supplier, headquartered in Tewksbury, MA, USA.  Siemens plans to add Avery’s technology to its Xcelerator portfolio. More specifically, Avery’s products will be combined with Siemens’ Questa verification IP offering.

Vishay Intertechnology, a manufacturer of discrete semiconductors and passive electronic components, has acquired MaxPower, a San Jose, California based fabless power semiconductor provider.

Further reading

The Semiconductor Industry Association (SIA) has released a thirty-page report identifying five key areas of the semiconductor R&D ecosystem that should be strengthened by the U.S. ‘CHIPS and Science Act’. Among many other analyses, the report includes some interesting data and infographics about the existing U.S. R&D organizations and comparisons with their European and Asian counterparts.

Proceedings of the Synopsys’ ARC Processor Summit 2022 are available for download from this page, which also includes abstracts of the eighteen presentations.

Canadian reverse engineering firm TechInsights has published the e-book “Lithography: gatekeeper to technological independence and advancement”. The research analyzes the history and future of lithography, China’s response to EUV export restrictions, etc.

This entry was posted on Friday, November 4th, 2022 at 8:26 am. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.