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Archive for June 24th, 2022

New fab rumors; TSMC’s innovations; low-temperature 3D chip bonding; new optical microphone

Friday, June 24th, 2022

The so-called metaverse now has its standardization initiative: called Metaverse Standards Forum, it brings together a few dozen founding members including Meta (Facebook), Microsoft and Nvidia – but, as noted by Reuters, the member list currently does not include Apple. However, “the Forum is open to any company, standards organization, or university at no charge,” says the announcement press release, so never say never. Let’s now move to our usual news round-up, that this week includes a couple of interesting academic works.

Quick EDA updates

Keysight’s PathWave RFPro, integrated with the Synopsys Custom Compiler design environment, is enabled to support TSMC’s newest N6RF Design Reference Flow.

Pulsic has added new features to its Unity product. Among them, Unity Chip Planning technology now can handle incremental floorplans; and the embedded integrations with Cadence Virtuoso and Synopsys Custom Compiler allow users to access Unity directly from these systems.

Cadence’s Design IP offering has already achieved over twenty design wins in TSMC’s 5nm process technology, with multiple first-pass silicon successes.

Xpeedic has recently released its latest RF EDA/Filter Design Platform 2022.

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