Intel reportedly interested in SiFive; Google’s AI-based chip floorplanning; TSMC roadmap; acquisitions

Acquisitions stand out in this week’s news roundup, catching up on some of the updates from the last fifteen days or so. But first, some interesting news about the evolution of the processor industry landscape, the use of deep learning in chip design, and foundry roadmaps.

Intel reportedly considering SiFive acquisition

The Nvidia-Arm deal – still under regulatory scrutiny – and the recent appointment of Pat Gelsinger as new Intel CEO are two factors that keep shaking the processor industry. Intel is reportedly considering the acquisition of SiFive, in a move that would enable the Santa Clara giant to add a rich portfolio of Risc-V-based IP, an open-source alternative to Arm. As noted in another report, with the acquisition Intel would also gain a software boost thanks to SiFive experts such as Chris Lattner. Meanwhile, concerns about the Nvidia-Arm deal start to emerge publicly. Qualcomm President Cristiano Amon has reportedly said that – in case SoftBank decides to launch an IPO for Arm – his company and many others would be interested in buying a stake.

Cristiano Amon. Credit: Qualcomm

Google’s research work on deep learning-based chip floorplanning: updates

Preceded in April 2020 by a preprint posted on the online arXiv repository, the paper from Azalia Mirhoseini and other Google researchers about deep learning- based chip floorplanning has recently been published by Nature magazine – with the addition of methods that improve results and that have been used in production to design the next generation of Google TPUs. One year after preprint, the topic cannot be considered ‘news’ anymore – but it’s definitely worth attention. Quoting from the paper abstract: “In under six hours, our method automatically generates chip floorplans that are superior or comparable to those produced by humans in all key metrics, including power consumption, performance and chip area.

To achieve this, we pose chip floorplanning as a reinforcement learning problem, and develop an edge-based graph convolutional neural network architecture capable of learning rich and transferable representations of the chip. As a result, our method utilizes past experience to become better and faster at solving new instances of the problem, allowing chip design to be performed by artificial agents with more experience than any human designer. Our method was used to design the next generation of Google’s artificial intelligence (AI) accelerators, and has the potential to save thousands of hours of human effort for each new generation. Finally, we believe that more powerful AI-designed hardware will fuel advances in AI, creating a symbiotic relationship between the two fields.”. Besides the research paper itself, Nature has also published an editorial article describing some aspects of the work. Among them, an estimate of the state space of macro block placement in the floorplanning problems solved in this study, 10²⁵⁰⁰; the fact that floorplans designed by humans differ significantly from those produced by a machine-learning system; and the authors’ intention to make their code publicly available. More details in this post from the Google AI Blog.

Azalia Mirhoseini. Source: http://azaliamirhoseini.com/

TSMC roadmap update

Taiwanese foundry TSMC provided the latest updates about its process roadmap on occasion of its 2021 Technology Symposium, held on early June. N4 development has proceeded smoothly, with risk production set for the third quarter of 2021. The company also introduced the N5A process for automotive applications, combining the PPA parameters of N5 with the requirements of AEC-Q100 Grade 2 and other automotive safety and quality standards. N5A is scheduled to be available in third quarter of 2022. TSMC confirmed that its N3 technology will begin volume production in the second half of 2022. Relying on a FinFET transistor architecture, N3 will offer up to 15% speed gain or consume up to 30% less power than N5, and provide up to 70% logic density gain. Another announcement concerned the new N6RF process, based on N6, aimed at 5G radio frequency and WiFi 6/6e solutions. TSMC also introduced enhancements to its 3DFabric family of 3D silicon stacking and advanced packaging technologies. The company will be offering larger reticle size for both its InFO_oS and CoWoS packaging solutions in 2021, enabling larger floor plans for chiplet and high-bandwidth memory integration. Additionally, the chip-on-wafer (CoW) version of TSMC-SoIC will be qualified on N7-on-N7 this year with production targeted for 2022. For mobile applications, TSMC is introducing its InFO_B solution, designed to integrate a mobile processor and to support DRAM stacking on the package.

TSMC’s CEO, C.C. Wei. Credit: TSMC

Acquisitions

Rambus has signed agreements to acquire two IP companies, PLDA and AnalogX, to support its CXL Memory Interconnect Initiative, a program focused on the shift to disaggregated architectures in data centers. PLDA is a provider of Compute Express Link (CXL) and PCI Express solutions, while AnalogX provides low power multi-standard connectivity SerDes IP solutions.

Siemens Digital Industries Software has acquired the proFPGA family of desktop prototyping technologies from German company Pro Design. Through a prior OEM relationship with Pro Design, proFPGA technology is already part of Siemens’ Xcelerator portfolio; bringing the proFPGA technology and team in-house can allow Siemens to further integrate this prototyping platform into its Veloce hardware-assisted verification system. The installed base of proFPGA currently amounts to over 1,900 systems across 120 active customers in fifteen countries.

Xilinx has acquired Germany-headquartered Silexica, a provider of C/C++ programming and analysis tools, to broaden its developer base. Silexica’s SLX FPGA tool suite will become integrated with the Xilinx Vitis unified software platform to reduce the learning curve for software developers building sophisticated applications on Xilinx technology. Leveraging standard high-level synthesis tools from Xilinx, the SLX FPGA tool suite tackles non-synthesizable and non-hardware aware C/C++ code, detects application parallelism, inserts pragmas, and determines optimal software and hardware partitioning. Silexica was spun out of RWTH Aachen University in 2014.

Autodesk has submitted a non-binding proposal to acquire all the outstanding shares of common stock of Altium (San Diego, CA), a developer of software for PCB design. “The proposed combination would advance Autodesk’s strategy to converge design and make through a unified design, engineering and manufacturing cloud platform,” the company stated in a press release, adding that “There is no certainty that any transaction will ultimately be agreed to.”

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