System-level challenges, machine learning in the spotlight at CadenceLIVE Americas 2021

The importance of a holistic system-level approach was one of the common themes across the keynotes speeches given by top executives and guests at CadenceLIVE Americas 2021, a virtual event held on June 8 and 9. Machine learning, of course, was a major topic too – both in terms of new product announcements and R&D directions.

The ‘semiconductor renaissance’ and the role of hyperscalers

Cadence CEO Lip-Bu Tan opened the event by discussing the theme of ‘semiconductor renaissance’, the current silicon boom fueled by 5G, autonomous vehicles, industrial IoT, AI/ML. “It’s the first time we have multiple strong drivers at the same time,” he noted. “A few years ago, people were thinking semiconductor was a slowing, sunset industry, but not anymore. (…) We are currently facing a supply chain issue, but it’s due to overwhelming broad base demand. It is a great time to be in the semiconductor and electronics industry.” In his speech, Lip-Bu Tan devoted a special attention to the role of hyperscalers. “Hyperscalers are at the center of the renaissance and data revolutions,” he said. “Massive CAPEX spend, estimated at over 120 billion last year; over six hundred hyperscale data centers, with over a hundred opened in pandemic year 2020,” he pointed out. “[Hyperscalers[ participate in all stages of the data cycle and are pushing the need for innovation in technologies across computer, memory, storage and networking. (…) Hyperscalers are also pushing the most advanced process nodes, focus on the latest IP protocols (…). And they need advanced packaging, and also a lot of system-level simulation. It’s not just about chips to meet their needs; system level optimization across compute, networking and other hardware is needed, but also software needs to be co-optimized.” Among other things, Lip-Bu Tan also underlined the growth opportunities offered by data analysis and edge computing. Providing a general overview of all Cadence business, he also mentioned that Cadence Cloud is being used by over 175 customers.

Lip-Bu Tan. Credit: Cadence

Machine learning-based PCB place & route

Cadence President Anirudh Devgan devoted part of his keynote to the introduction of Allegro X. “I believe this is the biggest innovation in package and board design in two decades, and this has been multiple years in the making,” he said. Devgan described the key innovations introduced by the new tool; among them, the unified approach to all design steps: “If you go to the system design space, which is PCB or module or package, they had multiple tools: one tool for schematic, one tool for layout etc. (…) Allegro X gives a unified cockpit to do analysis, to do schematic, to do layout, to capture the whole design flow into that environment.” The Allegro X feature that Devgan emphasized most is the use of machine learning for placement and routing. “Typically, package and board design does not use automation, it is mostly manual,” he noted. “But Allegro X for the first time has ML-based placement and routing technologies. (…) Package design or board design” – Devgan continued – “is very complicated, but the number of placeable objects is not that high, could be tens or hundreds of placeable objects. This is different than on chip, where you could have millions or billions of objects. So we can use a different kind of algorithms, more powerful ML genetic based algorithms to really do a good job in placement and routing of these things. This, I think, has been missing in this area for a while.” Devgan also recalled the acquisitions that Cadence made recently to strengthen its position from a system-level point of view; among them, computational fluid dynamics specialist Numeca. “Thermal simulation requires a combination of finite element and CFD, and Cadence is in a unique position to provide that,” he said. “Thermal simulation is very important going forward; important in general, but also with the emergence of 3D [integration].”

Anirudh Devgan. Credit: Cadence

A new Moore’s Law

System-level challenges also echoed in the keynote given by Partha Ranganathan, VP and Engineering Fellow at Google. Focusing mostly on a datacenter perspective, he maintained that performance growth can continue even after the end of Moore’s Law if the industry manages to take advantage of optimizations at all levels. “We have an opportunity to invent a new Moore’s Law,” he said, “one amplified by machine learning and delivered in the cloud.” One element of this new Moore’s Law would be machine learning accelerators, the special-purpose chips being developed to boost neural network performance. Discussing this aspect, Ranganathan underlined the importance of chip utilization: “It’s not just about designing efficient hardware to get a speed-up in performance (…), it’s also about making sure that the hardware is usable, which means investing into supporting compilers, in the supporting toolchains and debugger and so on as well.” According to Ranganathan, the second element of the new Moore’s Law would come from “thinking about the entire data center as a computer.” A key concept here is ‘server disaggregation’: “You can take an individual server and you can break it up disaggregated into its individual components,” he said. “You can start having these pools of computer, pools of memory, pools of non-volatile memory, pools of storage and so on. What you now have is an architecture that allows you to compose this in whatever form you want, based on whatever use cases that you’re looking at, what workload you’re looking at (…), and you provide very powerful capability through the composability and the software management that you can provide.” Therefore, in his view, “this new era of Moore’s Law is going to need innovation from both hardware and software.” Cloud will play a key role, according to Ranganathan: “Cloud can now become the delivery channel to democratize the reach of this new Moore’s Law to a wide variety of customers, but also buffer all customers from the whiplash of the Cambrian explosion of accelerators that we are likely to see in the future.”

Partha Ranganathan. Credit: Google

Machine learning-based prefetching

In terms of research directions aimed at leveraging the multiplier effect of machine learning, Ranganathan also provided an interesting example concerning the technique of prefetching data from memory: “One thing that we talked about doing was to think about using machine learning to do something similar to auto-complete, just like you have auto-complete for search when you type in characters on your search box, and you anticipate what the full search request is going to be. We can think about using machine learning to anticipate what the memory access pattern is, and proactively bring the data into our caches well ahead of when you’re gonna need to use it. We found that this approach is surprisingly effective and just an out-of-the-box machine learning prefetching model performed anywhere from two to four times better than the traditional approaches that we have been using in the past. More importantly, this approach also gives rich semantic insights, so we can then go back to the software layers to further improve software and get higher performance,” he said.

Another keynote was given by Yadunath Zambre from Air Force Research Laboratory, on the theme “AFRL Microelectronics Perspectives”. The agenda of CadenceLIVE Americas 2021 obviously included a huge number of technical presentations, available on demand until August 31, 2021.

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