Designers of some of today’s most complex chips shared their experiences in a virtual event organized by Ansys on September 23rd and 24th. Called IDEAS (Innovative Designs Enabled by Ansys Semiconductor), the web-hosted conference focused on the new multiphysics simulation challenges posed by advanced technology nodes as well as by 3D ICs and chiplet-based designs. The event was used by Ansys to reiterate its approach to simulation and to highlight some of its newest solutions, such as the ones based on the SeaScape big data analytics platform.
A host of new interdependent problems
Let’s briefly recap some of the new problems posed by advanced technology nodes, with the help of Ansys’ white papers. As geometries have shrunk, operating voltage has also scaled down, but threshold voltages of transistors have not scaled proportionately. This has led to an increased sensitivity to voltage drop (IR), and specifically to dynamic voltage drop, which can cause changes in transistor delays and clock jitter. Small geometries also boost the stress effect of high electric fields across the dielectric, resulting in worse aging behavior due to negative bias temperature instability (NBTI).
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