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Archive for April 24th, 2020

Simberian interview: signal integrity and power integrity challenges in high-speed PCB design

Friday, April 24th, 2020

EDACafe Special Report: Signal Integrity and Power Integrity Challenges in High-Speed PCB Design

Part Three – Interview with Yuriy Shlepnev, President of Simberian Inc.

Signal integrity and power integrity issues are becoming increasingly challenging for designers of high-speed PCBs required by next generation applications such as 5G and new semiconductor devices such as DDR5 memories. What are the key aspects that designers should consider? What are the capabilities of the tools offered by EDA vendors to address these issues? To answer these questions, EDACafe has interviewed experts from some of the major vendors in this specific market. For part three of our special report we submitted out questions to Altium, that has partnered with Simberian – a company specializing in electromagnetic signal integrity software – to address the increasing importance of high-speed design and the need for PI and SI simulation. As a result of this partnership, Simberian’s simulation capability is integrated in the latest versions of Altium Designer. Answering our question on behalf of Altium is Yuriy Shlepnev, president of Simberian.

EDACafe: Users of Altium Designer can leverage the capabilities of Simbeor, Simberian’s electromagnetic signal integrity software. What are the benefits of this solution?

Yuriy Shlepnev: New signal and power integrity challenges should be addressed during the layout of the board. Ideally, a board designed by a layout engineer should be immediately compliant with the new signal integrity requirements and power delivery constraints.  Such approach would eliminate needs for multiple tools, costly post-layout analysis and would shorten the design process. This can be achieved by embedding signal and power integrity tools into a layout tool.  Use of Simbeor signal integrity solvers to compute impedance for any type of PCB interconnect in Altium Designer, is the first step in building such an integrated solution. Opportunity to control trace impedance in the beginning of the design process cannot be underestimated.  Selection of materials and stackup structure are all affected by the PCB designers’ ability to achieve a target impedance, delay and losses in all critical interconnects. This can be done seamlessly in Altium Designer 20, with the user experience tailored for the layout engineers, combined with the accuracy of the extensively validated Simbeor solvers.

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