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 Bridging the Frontier
Bob Smith, Executive Director
Bob Smith, Executive Director
Bob Smith is Executive Director of the ESD Alliance responsible for its management and operations. Previously, Bob was senior vice president of Marketing and Business Development at Uniquify, responsible for brand development, positioning, strategy and business development activities. Bob began his … More »

Remote Work, Remote Chip Design: Building Chips in a Pandemic

 
May 19th, 2021 by Bob Smith, Executive Director

If you had trouble settling into working from home last year, you are not alone. Now try to imagine how our engineering community managed a collective set of challenges as they attempted complex chip innovation from their home offices. Yes, I know –– daunting.

And so, I invite you to attend a panel that shines a light on the chip design and verification project upheaval caused by the pandemic. Set aside an hour Wednesday, June 9, to join us for a lesson on overcoming the perils of chip design at home. It will be populated by chip design and verification engineers accustomed to robust software and hardware resources readily available at their physical office.

This panel is co-hosted by two stalwarts of the electronic system design ecosystem –– the ESD Alliance and Accellera, a long-overdue industry first that I expect will not be the last. The ESD Alliance and SEMI, where we are a Technology Community, welcome the partnership.

As our panelists will attest, work from home, WFH, remote work or whatever you call this last year changed our routines and our lives, possibly forever. Design and verification didn’t stop even though our panelists had to work through hits to their complicated flows and project cycles due to VPN tool and system access, Zoom-based collaboration and everyday home interruptions.

Tom Fitzpatrick

Moderator Tom Fitzpatrick, Strategic Verification Architect from Siemens EDA, will explore the range of challenges and triumphs with engineers from varied semiconductor disciplines and company sizes. The discussion will include modifications to development practices, coping with innovations requiring intense collaboration, the ability to evaluate and implement new methodologies, dealing with necessary visits to office labs, and the impact on product schedules. We might even get a set of Best Practices as we continue working from home, begin planning a return to the office and determine how that might be different.

Panelists:

  • Martin Barnasconi, Technical Director System Design & Verification Methodologies, NXP
  • Lu Dai, Senior Director of Engineering, Qualcomm
  • Ashish Darbari, CEO, Axiomise
  • Mark Glasser, Member of the Technical Staff, Cerebras
  • Patrick Lynch, Senior Engineering Manager, Xilinx

The virtual format will include time for audience questions.

Date: Wednesday, June 9

Time: 9-10am PDT

Pricing: Complimentary

Registration:  https://bit.ly/3eK3YdQ

Dave Kelf

Please help me welcome Dave Kelf, CMO of Breker Verification Systems, as our new Emerging Companies Chair and one of the organizers of the Accellera/ESD Alliance-hosted panels. It’s unlikely that Dave is a stranger to many readers of Bridging the Frontier. Therefore, I encourage you to welcome him to this volunteer role where he will develop an ongoing series of events for us. Of course, please offer him your event suggestions.

To learn more about the ESD Alliance, a SEMI Technology Community, and its programs, initiatives and upcoming events, visit the ESD Alliance website. Or contact me at bsmith@semi.org.

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