Shaping the Future of IT Infrastructure for Semiconductor Design at DAC

Note from Bob Smith, executive director of the ESD Alliance: This week, I turn over “Bridging the Frontier” to Derek Magill, engineering cloud architecture lead and global EDA license infrastructure lead at Qualcomm. Derek serves as chairman of CELUG and executive director of the Association of High Performance Computing Professionals.

Design Automation Conference (DAC) is only a few weeks away and excitement is building as plans finalize for the Design Infrastructure Alley, a section of the exhibit floor devoted to the infrastructure required to design chips and systems. Sixteen exhibitors and three days of insightful, thought-provoking content on engineering IT infrastructure topics make this a “must attend.” Just consider the cloud vendors populating the booths along the alley: Alibaba Cloud, Altair, Amazon Web Services, Cadence, Dell/EMC, FootPrintKU, Google, IBM, IC Manage, Metrics, Microsoft, Pure Storage Rescale, Six Nines, Suse and Univa. 

While DAC’s a great place to talk about new tools and methods to create more complex chips and systems, we rarely discuss the infrastructure needed to use these new methods and tools. Design Infrastructure Alley (Moscone West Level 1, booths 1237 thru 1255) bridges the gap between potential and execution and allows IT professionals, engineers and EDA suppliers to have a conversation about how best to enable design and verification. And, that brings us to the chock-full schedule of presentations at the Design-on-Cloud Pavilion theater with a host of panels and sessions on all things cloud. The complete program can be found at: https://bit.ly/2GkY2oo

Thirsty for more? Well, then join us as we continue the conversation at the Thirsty Bear Organic Brewery at 7pm for h’ors doevres, beer or wine, compliments of sponsors AWS, Cadence, Elastifile, the ESD Alliance and IC Manage. Thirsty Bear is two blocks down Howard from Moscone West to 661 Howard Street.

The “I Love DAC” promotion gives attendees free access to the exhibit floor, Design Infrastructure Alley and the EDA in the Cloud pavilion. DAC will be held in San Francisco’s Moscone Center West Monday, June 25 through Wednesday, June 27 from 10am until 6pm. Registration information can be found at: https://bit.ly/2sMKNa3

The yearly CELUG Meeting will be held separately Tuesday, June 26. Our focus will be on license topics.  Register is an additional $100. Come and meet your peers in the industry as well as some of our fantastic exhibitors in a fun, relaxed atmosphere. Lunch will be provided through the generosity of OpenIT.

While Design Infrastructure Alley was envisioned by the Association of High Performance Computing Professionals and the ESD Alliance, it wouldn’t be possible without the support and help from DAC’s Executive Committee. Thank you to one and all.

This year’s DAC is going to be special and I encourage you to be there to take part in these great conversations about shaping the future of our industry. For the first time, we’re going to talk about licensing, grid computing, storage management, data security and the cloud.

See you at DAC and the new Design Infrastructure Alley!

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