In a casual conversational exchange I overheard last week at DVCon (which reminded me of what Steve Jobs said to John Scully – “Do you want to sell sugared water for the rest of your life or do you want to…change the world?” – someone asked if the other’s company wanted to dink out press releases forever or if the company wanted to tell a story that mattered to its audiences.
This conversation got me thinking……There’s nothing wrong with sending out press releases but companies get optimal effect and value when they issue press releases for more than mere information distribution.
What would that be? To reinforce, substantiate or bolster the company’s story. Sending out press releases (or saying, writing or doing any outbound efforts) ought to convey at least one of the company’s message points.
So you thought our blog last week was our last prediction? Just kidding.
We actually have one more prophesy……from Michel Courtoy, esteemed EDA executive, entrepreneur and angel investor.
“As a member of the EDA community, when I look at 2013, I see a key dynamic in our customer base: chip = SoC. Across the board now, designs are created by combining multiple IPs from different sources that include embedded processors, multiple interfaces and memories. This is true across the spectrum from simple microcontrollers, to multi-function chips for consumer devices, all the way to the most complex multi-core microprocessors. Hence technologies that accelerate the design and verification of SoCs will thrive while technologies targeting the IP-level will find a saturated market.
Internal to the EDA market, we have been bombarded with messages of gloom triggered by the consolidation that has eliminated most ‘mid-size’ EDA suppliers, leaving mainly the ‘Big 3 and the 100 dwarfs’. Well, this might be the opportunity that the start-ups need: where will the Big 3 fill their shopping cart now when looking for new technologies? To stay competitive, the Big 3 have to go back to acquiring start-ups and find a way to monetize new technologies in their sales channel. This will reinvigorate the ecosystem for EDA start-ups and lead to more innovation.
Remember Carnac the Magnificent from The Tonight Show? Well, his son, Warnac the Magnificent, aka Warren Savage, will divine the future of the IP industry this week in our blog. Warren is founder and CEO of IPextreme.
In 2012, the industry discussed the qualities that reliable and reusable IP needs and the metric to measure those qualities. We think 2013 will be the year that the value of IP becomes tangible.
We tapped Warren Savage, CEO of IPextreme, to give us his thoughts on how to value IP.
Ed: So Warren, how do we figure out IP’s value?
Warren: In the most tangible sense, I think the question ought to be “how do we monetize IP?”
IPextreme has been at the forefront of this since we founded the company back in 2004, and it really was “extreme” back in those days to discuss licensing those “crown jewels.” But now it is increasingly mainstream and certainly the topic for industry discussion.
So one consideration revolves around the ton of licensing done in the industry today that is hidden. Primarily around patents and process technology. The transactional IP licensing that we specialize in, is really something that IPextreme invented.
Over the last couple of weeks we’ve been exploring the concept of stale IP – what it is and what to do about it. I’ve gotten insights from two industry experts in IP (Harrison Beasley of GSA and Manoj Bhatnagar of Atrenta). I will wrap up my series on this topic with one final view – from IP provider, Warren Savage, founder and CEO of IPextreme. He will challenge the whole idea of stale IP in this interview.
Liz: Stale IP – what is it?
Warren: Frankly, I’ve been working in IP for seventeen years, with most of the world’s largest IP and chip companies, and I have never heard the term before. I think people who think about IP being “stale” may be confused about the difference between IP and code. IP is certainly code, but code is not necessarily IP. I have argued vociferously for years on this topic, particularly opposing those who would claim that IP is a service business (see an old blog post by me “Repeat after me: IP is Product Business…” http://blogs.ip-extreme.com/2009/07/test-page.html). I think this notion of “stale IP” is sort of a regurgitation of the idea that there are classes of IP. For me, IP is something that is reusable indefinitely and valuable as long as there is a market for it.
In my last blog, Harrison Beasley shared his views on stale IP. This week we hear from Manoj Bhatnagar, Senior Director, Field Delivery and Support at Atrenta.
Liz: Manoj, what is stale IP?
Manoj:An IP may become stale because either its specifications have changed (e.g., USB 1.0 vs. 2.0 vs. 3.0) or there is a better implementation available (e.g., a graphics core is now running at 800Mhz instead of 500Mhz). Typically, people will use the latest version, and the older versions are no longer used. So the stale IPs in this case will die a natural death. What is more challenging, however, is a specific IP developed for a specific project and, over time, no other project used it. So the IP becomes stale. Most of my answers will apply to this type of stale IP.
Liz: What’s so bad about it?
Manoj: The main issue with a stale IP is the fact that nobody really knows the details about it. If I were to use that IP, I would be putting my design at risk because I am now adding some logic to my design for which I don’t have all the information and can’t find anyone who can provide that information either.
Liz: How do we prevent it from being stale?
Manoj: One of the key things that can be done to prevent IP from going stale is to document the IP. I don’t know how many people still remember the TTL datasheets but when you looked at the datasheet, you got complete visibility into what that component did. The same concept can be applied to present day IPs, where you document various characteristics of the IP. For a hard IP, this may be the timing characteristics, physical profile, etc. while for a soft IP this may be timing constraints, clock domain information, testability profile and power profile.
Stale IP is beginning to rear its ugly head. It’s like having too many books on your bookshelf – always an issue in my house. Where do you put the new ones? Which ones do you keep? What do you do with the ones you don’t want to keep?
I (Liz Massingill) recently polled some experts in the industry to get their stance on stale IP. Over the next few weeks I’ll share their views with you.
I’ll start with Harrison Beasley, Manager of the Technical Working Groups at Global Semiconductor Alliance (GSA). Here’s what he had to say:
Liz: Stale IP – what is it?
Harrison: IP becomes stale when the underlying code is out of date. This could be due to changes in a specification, errors found in use, soft IP not being updated, etc. My assumption is that stale IP will not perform the task for which it was created.
Liz: What’s so bad about it?
Harrison: Using stale IP could lead to non-functional silicon, tape out delays, end product failures, etc.
Liz: How do we prevent it from being stale?
Harrison: For internal IP, code checks before layout, during timing analysis, during verification, and before final tape-out help ensure the latest IP version is used. For third party IP, similar rules apply, but the user must coordinate with the IP Supplier to ensure changes are promulgated to the user.
What are the challenges in managing semiconductor IP?
How can we solve IP reuse integration?
If you’d like to know the answers to these questions and others, check out this presentation by Michael Johnson of Atrenta from the Constellations 2012 conference.
Johnson succinctly defines soft IP quality and proposes a way for the industry to get to a soft IP quality standard.
Why can 3rd party IP impede a design getting to tapeout? Why is IP reuse costing design projects more time and effort? And what can we do about it? Piyush Sancheti, VP of Product Marketing at Atrenta, explores these issues and answers some of these questions in the viewpoint below on the GSA IP Working Group blog:
Yasushi Ozaki, Director of Engineering Department overseeing product design and Development, at Renesas, spoke at the Atrenta Technology Forum First inYokohama. This is Tech-On’s coverage of his presentation and his evaluation of SpyGlass Physical, which is an EDA tool for estimating chip area and logic depth at the RTL stage:
In a casual conversational exchange I overheard last week at DVCon (which reminded me of what Steve Jobs said to John Scully – “Do you want to sell sugared water for the rest of your life or do you want to…change the world?” – someone asked if the other’s company wanted to dink out press releases forever or if the company wanted to tell a story that mattered to its audiences.
