Posts Tagged ‘Mike Demler’
Monday, February 17th, 2014
Next up in our series of predictions is the astute insight of Mike Demler, Senior Analyst with The Linley Group & MICROPROCESSOR report, and former EDA & Chip Design news analyst.
“It’s all about the ecosystem triad: EDA + foundry + IP. Cadence and Synopsys continue to evolve more in the IP direction, and there is really not much to say about the tools that hasn’t been said for a long time —just make it all work together! Redundant “standards” and artificial barriers to interoperability cost the semiconductor industry by lowering productivity. This is the problem with the disaggregated model. Back in the days when “real men” had fabs, companies could develop complete design flows without such obstacles.
The triad needs to work together to get over the stall inMoore’s Law at 28nm. Foundries are incurring delays in getting to 16/14nm FinFETS, and almost nobody is going to use 20nm. The chip industry needs an overall lower-cost solution in order to make sub-28nm processes economically viable. Forget 3D ICs, those will be niche products for a long time, about as popular as 3D TV.
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Tags: 3D ICs, Cadence, Chip Design, EDA, EDA & IP, Electronic Design Automation, FinFETs, foundries, foundry, Intellectual property, Lee Public Relations, Mike Demler, Moore's Law, Semiconductor IP, semiconductors, SoC, Synopsys, System on Chip, The Linley Group, wearables, www.leepr.com
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Sunday, June 16th, 2013
As Mike Demler predicted back in May, the “Internet of Things” was all the buzz at DAC this year.
Freescale CEO Gregg Lowe talked about the opportunities and challenges in his keynote.
Mentor CEO Wally Rhines said in his keynote that the big growth in the semiconductor industry will come with the Internet of Things.
It was simultaneously discussed at the GSA European Executive Forum in Munich and the Sensors Expo in Chicago.
What do you think?
Is it the next big thing?
Can EDA step up to the challenge?
And what does it mean to our future?
Tags: 50DAC, Brian Bailey, Bryon Moyer, Chip Design, DAC, Design Automation Conference, EDA, EDN, EE Journal, Electronic Design Automation, Freescale, Gregg Lowe, GSA, GSA European Executive Forum, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, Lee PR, Linley Group, Mentor, Mike Demler, semiconductors, Sensors, Sensors Expo, Wally Rhines
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Friday, May 25th, 2012
Named by industry observers as “the biggest EDA company you’ve never heard of” and “a rare and endangered species” of EDA companies, ICScape will bolt out of stealth mode to exhibit at DAC for the first time.
Founded in 2005 by Steve Yang and Jason Xing, the company’s been busy over the last year. How? Merging with analog EDA vendor Huada Empyrean Software (HES), getting that US$28M infusion to fund global R&D, customer support and sales expansion, and working on OpenAccess-based product lines that we’ll probably see in some integrated form toward the end of 2012.
ICScape’s booth will greet attendees right at the entrance to the exhibit floor, in Booth 1602. The company’s executives will be there to:
1) talk about its technology,
2) introduce current customers (a major silicon valley Fabless IC company and a major Silicon Valley analog device company) who will also be available at the booth to share firsthand experience,…..and
3) ensure that ICScape will be one of the EDA names that all of you will have heard of.
See what Paul McLellan, Mike Demler and Brian Bailey have to say about ICScape:
http://www.semiwiki.com/forum/content/1248-biggest-eda-company-you-ve-never-heard.html
http://www.eedailynews.com/2012/05/examining-rare-and-endangered-species.html
http://www.eetimes.com/electronics-blogs/other/4372423/New-Companies-exhibiting-at-DAC—ICScape
See you at DAC!
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Note: Lee PR does work for ICScape.
Tags: A/MS, analog/mixed-signal, Brian Bailey, DAC, Design Automation Conference, design closure, EDA, EE Daily News, EE Times, Electronics Design Automation, Finance, HES, Huada Empyrean, IC, ICScape, integrated circuits, Mike Demler, Paul McLellan, SemiWiki, SoC, SoC design, System on Chip
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