What's PR got to do with it? Posts Tagged ‘Intellectual property’Predictions 2014: Angel Orrantia, of VC SKTA Innopartners, on the revitalized semiconductor ecosystem.Sunday, January 19th, 2014
Next up in our series of 2014 forecasts we have the sage predictions of Angel Orrantia, Business Development Director at SKTA Innopartners LLC….
“Aside from some massive players, the rest of the chip industry has been forced to adopt capital light business models. Simultaneously, we’re seeing the mask costs making advanced nodes prohibitively expensive. The RTL signoff conversation goes to AsiaWednesday, August 28th, 2013
Atrenta will discuss what RTL signoff requirements are needed for SoC designers in China, South Korea and Taiwan at their upcoming seminars in September and October. Click here for more information.
LPR does work for Atrenta Warren Savage interviews Mike Gianfagna on the importance of collaborationSunday, June 2nd, 2013IP exerting its presence at DACMonday, May 20th, 2013
With less than 3 weeks away until DAC’13, Liz and I asked Warren Savage about IPextreme’s and Constellations’ planned presence there. Warren is not only founder and CEO of IPextreme, but also head of the IP consortium, Constellations. We caught up with Warren recently, and Mike Gianfagna, VP of Corporate Marketing at Atrenta (Atrenta is a Constellations partner), happened to be there. So, the two of them let us in on what Constellations would be up to at DAC.
Liz: Warren, what play does IP have at DAC this year?  Warren Savage Warren: Change is slow, but IPextreme and Constellations are happy to report change is afoot and our workshop at DAC serves as a prime example of this. Together with TSMC and our Constellations partners Atrenta and Sonics, we are pleased to present “Driving Quality to the Desktop of the DAC Engineer” on Sunday, June 2 from 1:00 to 5:00 PM. This workshop showcases a foundry, two IP companies, and an EDA company working together—exactly as we do every day. Why, then, is this the first DAC workshop of its kind? Why have the ties binding us together in the semiconductor ecosystem not been highlighted before? Perhaps the old saying, “If all you have is a hammer, everything looks like a nail,” is the only explanation. At the end of the day, our customers need all of us – both IP providers and EDA vendors. We owe it to them not only to recognize that, but also to make their lives easier by working together. IP up front at DACTuesday, May 14th, 2013These two trend setters share their opinions on the BIG DAC themes in 2013.
I see two related trends: 1) More signoff activity earlier in the design flow 2) More focus on IP quality and usability Both of these trends represent a maturing of design tools and business models. Because of the tremendous complexity that sub-20 nm design brings, it becomes more important to get the design right as early as possible. The tools are maturing in the earlier stages, and more designers are demanding clean reports, or sign-off level quality audits as a result. This is helping to reduce schedule delays and design costs – good for the industry. Semiconductor IP is also maturing – both use models and business models. There is a growing focus on reporting delivered quality and robustness. This will allow IP providers that deliver the best IP to flourish. Also good for the industry. We’ll see an increase in conversations about IP providers collaborating with the rest of the ecosystem at DAC. Another good trend. What’s the BIG theme for DAC50?Tuesday, May 14th, 2013DAC is upon us….and in Austin, of all places – the island in the middle of Texas. As it’s getting closer, we were wondering what the BIG theme is for the 50th DAC. So, we asked a few of our friends and colleagues in the industry. Here’s what a few of them had to say.
I expect DAC to continue to explore low power challenges, with much talk about solving FinFET issues at 14 and 10 nm. Then there is the ever expanding SoC and how to handle all of the challenges that come with greater integration and IP reuse. Finally, what’s DAC without a discussion of Moore’s Law and whether it will/won’t continue to define industry progress in the years to come? ~ Joe Desposito, Editor-in-Chief, Electronic Design
New blood making its mark on EDAMonday, April 15th, 2013
For more than several years now, Peggy Aycinena has noted the dearth of new blood entering the EDA and IP industry ranks. Those of us who started in the industry in the 1980s still seem to dominate the corporate, engineering and marketing ranks. One area where we do see an infusion of new generation folks is in the marketing communications area. So Liz Massingill and I asked three of the new generation people to allow us to put them on the spot and talk a little about what new and old generation EDA and IP people bring to the party. With us are: McKenzie Mortensen of IPextreme, Darcy Pierce of Synopsys and Hannah Watanabe of Synopsys. Ed: McKenzie, Darcy, Hannah, thanks for taking the time to speak with us today. So let’s kick off with a question about you. What does the new generation bring to EDA and IP that the old generation doesn’t? McKenzie: We love to shake things up. Darcy: One of the more obvious attributes that I think our generation brings to the table is a fresh perspective, especially in the “older” industry of EDA where everyone seems to have 20+ years of experience. Hannah: I think we bring a fresh perspective on how technology is being used today, especially by those who are just entering the work force, the Generation Y people. Predictions 2013 – Warnac the Magnificent has spokenTuesday, January 22nd, 2013
Remember Carnac the Magnificent from The Tonight Show? Well, his son, Warnac the Magnificent, aka Warren Savage, will divine the future of the IP industry this week in our blog. Warren is founder and CEO of IPextreme. How to value IPTuesday, January 8th, 2013
In 2012, the industry discussed the qualities that reliable and reusable IP needs and the metric to measure those qualities. We think 2013 will be the year that the value of IP becomes tangible. We tapped Warren Savage, CEO of IPextreme, to give us his thoughts on how to value IP. Ed: So Warren, how do we figure out IP’s value? Warren: In the most tangible sense, I think the question ought to be “how do we monetize IP?” IPextreme has been at the forefront of this since we founded the company back in 2004, and it really was “extreme” back in those days to discuss licensing those “crown jewels.” But now it is increasingly mainstream and certainly the topic for industry discussion. So one consideration revolves around the ton of licensing done in the industry today that is hidden. Primarily around patents and process technology. The transactional IP licensing that we specialize in, is really something that IPextreme invented. Stale IP – another viewMonday, November 26th, 2012
Liz: Manoj, what is stale IP? Manoj: An IP may become stale because either its specifications have changed (e.g., USB 1.0 vs. 2.0 vs. 3.0) or there is a better implementation available (e.g., a graphics core is now running at 800Mhz instead of 500Mhz). Typically, people will use the latest version, and the older versions are no longer used. So the stale IPs in this case will die a natural death. What is more challenging, however, is a specific IP developed for a specific project and, over time, no other project used it. So the IP becomes stale. Most of my answers will apply to this type of stale IP. Liz: What’s so bad about it? Manoj: The main issue with a stale IP is the fact that nobody really knows the details about it. If I were to use that IP, I would be putting my design at risk because I am now adding some logic to my design for which I don’t have all the information and can’t find anyone who can provide that information either. Liz: How do we prevent it from being stale? Manoj: One of the key things that can be done to prevent IP from going stale is to document the IP. I don’t know how many people still remember the TTL datasheets but when you looked at the datasheet, you got complete visibility into what that component did. The same concept can be applied to present day IPs, where you document various characteristics of the IP. For a hard IP, this may be the timing characteristics, physical profile, etc. while for a soft IP this may be timing constraints, clock domain information, testability profile and power profile. |
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