What's PR got to do with it? Ed Lee
Ed Lee has been around EDA since before it was called EDA. He cut his teeth doing Public Relations with Valid, Cadence, Mentor, ECAD, VLSI, AMI and a host of others. And he has introduced more than three dozen EDA startups, ranging from the first commercial IP company to the latest statistical … More » How do software and hardware come together?March 12th, 2014 by Ed Lee
Software is beginning to take on a bigger role in the SoC design world. How do we get to SW-HW co-verification? This topic was the center of discussion at a private event last week co-located with DVCon. The event, hosted by Jim Hogan and sponsored by Vayavya Labs Pvt. Ltd., included a panel discussion with Frank Schirrmeister (Cadence), Tomas Evensen (Xilinx) and Parag Naik (Saankhya). George Lotridge of VMware and Michael Bair of Intel also gave presentations. Click here for the presentations. The audience was quite vocal about their issues, concerns, suggestions regarding the need for software and hardware to come together. The question of the four-hour event? How will we get “there?” Questions for us all to ponder: What is the Rosetta stone between hardware and software? (One person said the device driver was.) Who has the skills to write the specification for the model? Who writes the validation software? And… Who’s right? The hardware guy or the software guy? (spoken in jest…I think, since a hardware guy said software guys had an attitude…and a software guy said the same thing about hardware guys) What’s going to break the log jam? When will the pain be big enough to switch to automation? What are YOUR thoughts on any or all of these questions? Tags: Cadence, Chip Design, device driver, EDA, Electronic Design Automation, Frank Schirrmeister, George Lotridge, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intel, Jim Hogan, Lee PR, Michael Bair, Parag Naik, Saankhya Labs, semiconductors, SoC, software, software-driven system-level verification, SW-HW co-verification, System on Chip, system-level verification, Tomas Evensen, Vayavya, VMware, www.leepr.com, Xilinx |