Atrenta will discuss what RTL signoff requirements are needed for SoC designers in China, South Korea and Taiwan at their upcoming seminars in September and October.
Click here for more information.
LPR does work for Atrenta
What's PR got to do with it? Archive for August, 2013The RTL signoff conversation goes to AsiaWednesday, August 28th, 2013
Atrenta will discuss what RTL signoff requirements are needed for SoC designers in China, South Korea and Taiwan at their upcoming seminars in September and October. Click here for more information.
LPR does work for Atrenta How to avoid timing exception pitfallsTuesday, August 20th, 2013We often think that we’ve got the timing job nailed down and that there aren’t any problems that we can’t easily, almost routinely solve. Using timing exceptions to optimize synthesis or P&R shouldn’t be a problem. However, making an error when specifying timing exceptions can possibly shut down a design project. Take a look at what Atrenta’s Shaker Sarwary, Ramesh Dewangan and Sridhar Gangadharan say about how to avoid this situation: (Note: white paper download requires registration) LeePR does work for Atrenta.
The Semiconductor Supply Chain TomorrowMonday, August 12th, 2013Before the summer ends and the summer blockbuster movies and DAC become a distant memory (still shaking my head over The Lone Ranger’s flop), let me just share Mike Gianfagna’s vision for next summer’s blockbuster. It’s a tad more like Terminator 2 than the masked man and Tonto. And it may not be too far from reality – that’s what’s exciting…..and scary. Of course it’s about the semiconductor supply chain and how it might affect our lives in the future.
Click here to look into the future. ~ Liz |
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