Aldec Design and Verification 
Radek Nawrot
Radek is a software product manager at Aldec, responsible for Active-HDL and Riviera-PRO product lines. He has over 7 years of experience in design and verification, including his role in the R&D division of Aldec in Europe. Radek hold his M.S. in Electronic and Communication Engineering from … More » FPGA VHDL Verification – Can we do this faster – with better quality – at no extra cost?November 14th, 2016 by Radek Nawrot
As I recently shared, UVVM, VHDL’s long-awaited alternative to UVM, promises to be interesting. Later this week, I’ll be joined by Espen Tallaksen, Bitvis Managing Director and Founder for a joint webinar, UVVM – A game changer for FPGA VHDL Verification. Below, please find Espen Tallaksen’s recent guest blog on the topic that originally appeared on the Aldec Blog. FPGA VHDL Verification This is actually possible – and with an average efficiency improvement of 20 to 50% for medium to high complexity FPGAs. Less for data path oriented designs and more for control or protocol oriented designs. At no extra cost. All that is required is that you do your testbench development the same way you do your design. Every single FPGA designer knows that a good top level design architecture is critical. Most FPGA designers also know that a good microarchitecture is at least as important for module design. It should thus be obvious that a good architecture is also equally important for your testbench, but for some strange reason most testbenches do not have the same good architecture as the design being verified. Most designers agree that the following are critical for an efficient development of a high quality design module: – Overview, Readability, Simplicity – Modifiability, Maintainability, Extendibility – Debuggability – Reusability So why should testbenches be any different, with on average the same time usage as the actual design? Beer, Cars, and Verification. My thoughts after DVCon EuropeNovember 9th, 2016 by Radek Nawrot
Yet, nowhere else like here in the heart of Bavaria has the discussion about cars acquired such importance. In this region known as the European Detroit, cars are a secular religion. A few years ago we were wondering… how? Two years ago… when? Today production has its hands full and engineers are simply wondering… what’s next? As with the American election, there is a sense that we are awaiting another revolution. Within a few dozen years, internal combustion engines will become extinct like dinosaurs, or become as Juergen Weyer of NXP has said, like “Kodak in the era of digital photography”. And so we turn to the electronics field as the main solution for this new era. With this turn, ahead of us opens up new challenges related to design and testing, not to mention the safety of billions of users. In the vastness of topics such as Automotive and IoT, I would not want us to miss this nugget from this year’s DVCon Europe Conference: UVVM, VHDL’s long-awaited alternative to UVM. With the large presence of VHDL in Europe, Universal VHDL Verification Methodology (UVVM) could not have been born anywhere else. The concept is based on the Bus Functional Model enriched by the favor of the well-known and liked OSVVM… and it promises to be interesting. Read the rest of Beer, Cars, and Verification. My thoughts after DVCon Europe FPGAs Accelerating IoT Gateway and Infrastructure TiersOctober 4th, 2016 by Zibi Zalewski, General Manager, Hardware Division
The Internet of Things (IoT) has become the main topic in the technological world; it seems everybody is talking about it as the next wave in electronic systems. The scope of the IoT is so wide now, some have suggested changing the name to the Internet of Everything. We now expect all devices we use in our personal and professional lives to be connected, starting from the obvious ones in smartphones and computers, going through wearables, smart home and security devices, to industrial automation applications, and of course automotive electronics. Creating devices for the IoT is a big challenge for engineering teams at the design and verification levels, but also at the application and data levels. As all those devices (already estimated to number in the billions, and growing) start generating their data, IoT gateways and infrastructure will need to experience a new revolution. Clouds and data farms will become a common medium not only for data storage and message exchange, but also for processing and analytics which will require much more specialized computing power. Read the rest of FPGAs Accelerating IoT Gateway and Infrastructure Tiers Aldec Engineers: Taking Action and Giving Back as a TeamSeptember 9th, 2016 by Radek Nawrot
For engineers, the importance of keeping active cannot be understated. When thousands of hours are spent seated in front of monitors, healthy activities such as running are more than fun… they are necessary. At Aldec, our team enjoys combining a love of fitness with the act of serving others. I am proud to say that I work with a team of people who not only deliver amazing results every day at the office, but also do their best to help other people. This year, once again Aldec Engineers took part in the Katowice Business Run, a charity event that helps amputees to return to a normal life. In four years, this run has raised over $600,000 and involved thousands of engineers in this healthy and noble goal to support people following amputation procedures. Read the rest of Aldec Engineers: Taking Action and Giving Back as a Team It’s Time to Get Your University in Sync with Zynq: Insight From a College StudentAugust 17th, 2016 by Aldec Interns
Today’s article is authored by Zach Nelson, Aldec FAE Intern. Zach is a Field Application Engineer Intern with Aldec, working in tandem with his fellow interns to develop hardware specific applications. He is set to graduate with a B.S. in Electrical Engineering from University of Nevada, Las Vegas in 2017. His field interests include ASIC Design & Solid State Electronics. It’s time for Universities to say goodbye to their outdated FPGA boards and introduce the Xilinx® Zynq™ chip. The Zynq chip is a device which combines an FPGA fabric with a processing unit. The Zynq chip is very similar to other FPGA devices, but it does have a few key advantages and features that can enhance your designs and increase its capabilities. What can Zynq do? The Zynq chip has applications in the design fields related to:
FPGA The Programmable-Logic can be used in isolation of the processor which allows it to be used like a general FPGA device which can help support the topics covered in any VHDL/Verilog class as well as Digital Design. It is much easier to facilitate growth and learning in a project-based curiculum when you have a device such as the Zynq to interface with. Read the rest of It’s Time to Get Your University in Sync with Zynq: Insight From a College Student Introduction to AXI Protocol: Understanding the AXI interfaceAugust 17th, 2016 by Aldec Interns
When part of a team, your group can become more capable than a single individual, but only if your team can work together and communicate effectively. Having members of a group talk over each other leads to nothing but a cacophony, and nothing gets done. For this reason protocols need to be established, such as letting others speak without interruption, or facing those you are addressing. The same is necessary with electronics, especially with system on chip (SoC) designs. The protocol used by many SoC today is AXI, or Advanced eXtensible Interface, and is part of the ARM Advanced Microcontroller Bus Architecture (AMBA) specification. It is especially prevalent in Xilinx’s Zynq devices, providing the interface between the processing system and programmable logic sections of the chip. Read the rest of Introduction to AXI Protocol: Understanding the AXI interface The UVM Configuration DatabaseMay 31st, 2016 by Henry Chan
Take the UVM configuration database for example. It basically acts as a repository so that when the time comes, certain portions of the UVM testbench can be obtained from the database and used to build the structure. When items are placed in the database with a set() method (uvm_config_db::set()), components in lower levels will call the get() method in order to obtain the necessary parts to build the verification framework. Sharing an interfaceIf I were to ‘set’ an interface from my top level into the database while simultaneously giving it an identifying name, officially referred to as the ‘field name’, I could later use the field name to retrieve that interface in my driver to connect to the DUT by calling the get() method (uvm_config_db::get()).
Fig. 1) Setting the interface in the configuration database using an identifier ‘my_identifier’
Fig. 2) In order to connect a monitor or driver to the dut, the get() function will need to be called to access the interface in the respective build phase. Setting up configurations
This is what UVM refers to as passive and active modes. Passive mode is where only a monitor exists to observe data and active mode is where a driver and sequencer are needed to generate stimulus. Placing certain variables in the configuration database can help to determine whether the testbench is setup as passive or active. In order to declare the testbench as passive or active, a configuration object is created. The built in uvm_active_passive_enum data type is used to indicate whether the testbench is UVM_ACTIVE or UVM_PASSIVE.
Fig. 3) An example configuration For the rest of this article, visit the Aldec Design and Verification Blog. Vegetarian Dining in Austin – DAC 2016May 31st, 2016 by Sunil Sahoo
But there’s one area where this Texas city feels right at home in the rest of the Lone Star State, and that’s the cuisine. Go into the almost any trendy restaurant, and it’s possible to order a meal that has bacon in everything. Whether it’s the Paleo influence, or the craft food movement, or a remnant of good old Southern cooking, there are a lot of meaty options. That’s great, you say, except I don’t care how ethically sourced the pork is. Dude, I’m a vegetarian. Never fear. If you plan to visit our fair city for our industry’s upcoming Design Automation Conference (DAC 2016), rest assured you can find great vegetarian dining options in and around downtown Austin. And while UBER may have left Austin, you can still walk or catch a cab from your hotel or the Convention Center to visit these great restaurants (scroll down for map). Mainstream Options: You’re a Vegetarian, But the Rest of Your Party Wants Meat
B. 24 Diner, like many Austin restaurants, was featured on the Food Network, with the result that this trendy spot can be mobbed. Its allure is comforting food served all night long, with plenty of vegetarian options, like veggie hash, mushroom and veggie burgers, and a variety of tempting salads. 24 Diner. 600 Lamar. 512.472.5400. $$ C. I love the intimacy of Koriente, a Korean health food restaurant with garden dining tucked into a little warren of shops and restaurants at the east end of Sixth Street, right before you hit the I 35 overpass. It was founded by a mom who hated to cook and wanted to make a place where other moms could bring their families for nourishing, healthy, delicious food. Most of the entrees are vegetable based; for a couple extra bucks, add meat and eggs to the mix. But you might want to walk over from your hotel. Parking is at a minimum here. Koriente. 621 East 7th. 512.275.0852. $ D. The Blue Dahlia Bistro is right across the highway in the heart of East Austin, still walking distance from downtown. The restaurant’s promise is that you can “relax and feel like you are in the European countryside.” That might be a tiny stretch, but I have to admit — they do have a truly cozy and inviting outdoor space. They serve yummy French-inspired dishes and have a good selection of vegetarian options, including an all-day breakfast menu. The Blue Dahlia.1115 East 11th Street. 512.542.9542. $ Hardcore and Retro: You Won’t Find Meat on Any of These Plates E. If you’re looking for a glimpse of the Austin of Slackerfame, venture a few miles north to the University neighborhood of Hyde Park, where Mother’s Cafe has been dishing up family style vegetarian and vegan cuisine since 1980. The restaurant has spruced up with a recent makeover, but they haven’t really changed their menu. There’s nowhere else in town where you can order Mushroom Stroganoff or BBQ Tofu. Ask to be seated in the Garden Room, an Austin tradition. Mother’s Cafe. 4215 Duval. 512.451.3994. $ F. Casa de Luz, located about a half mile from downtown, in the hippest part of East Austin, describes itself as Austin’s “only all-organic dining and community center.” They take good nutrition very seriously here; even the drinking water that serve is filtered to remove fluoride. Each day, they prepare a different menu from scratch, using plant-based foods. That means most of the food they serve is vegan as well. Casa de Luz. 1701 Toomey Road. 512).476.2535. $ G. Mr. Natural lets you enjoy Tex-Mex cuisine without worrying that someone is sticking lard in those beans. The East Austin restaurant is 100 percent vegetarian, and the place also includes a juice bar and a bakery that has won several awards, including “Best Tres Leches” from the Austin Chronicle.That is really saying something: the recipe is vegan. Mr. Natural. 1901 Cesar Chavez. 512.477.5228. $ H. There aren’t a lot of 100 percent vegan options in the Weird City, but East Austin Counter Culturefits the bill. Whenever possible, the chefs here try to use ethically sourced and organic ingredients, and their menu is a combination of classic vegetarian dishes like Lentil Loaf and Mac and Cheeze (the “cheese” made from cashews) and curiosity-inspiring fare such as the Jackfruit BBQ Sandwich. They also serve gluten-free pizza. Counter Culture.2337 East Cesar Chavez. 512.524.1540. Quick and Trendy Veggie Bites I. You can’t talk about food in Austin without at least a nod to one of the city’s many food trucks. Arlo’s is the place to go downtown for a late night vegan burger or seiten “chicken” patty. You want fries with that? No problem. Arlo’s. 900 Red River. 512.840.1600. $ J. And for dessert? Lick Honest Ice Creams offers a variety of “weird” flavors — I love the roasted beet and fresh mint — including some vegan options. The staff lets folks sample as many flavors as they like, so the line might move slowly!, Suite 1135. 512.363.5622. $ Well there you have it. You see, if you’re a vegetarian or looking to have a meal with vegetarian colleague or client, Austin has you covered. I hope you’ll find these tips useful. If you have any other questions about our fair city, please stop by and see me at DAC Booth #619. If you’d like to learn more about Aldec’s Scalable Emulation Solutions or ASIC Verification Spectrum, I hope you’ll register for a one-on-one presentation at DAC, or call +1-702-990-4400 or email us at sales@aldec.com.
For the rest of this article, visit the Aldec Design and Verification Blog. The hardest part of DO-254 is…May 23rd, 2016 by Louie De Luna
We just wrapped up this year’s 3-day DO-254 Practitioner’s Course, and each year I learn something new. In this year’s training we had attendees from major aerospace companies including Curtiss Wright, Rolls Royce, Sierra Nevada Corporation, Thales and Woodward. It’s always a pleasure to meet the aerospace folks and learn about their projects, goals and challenges. This is the fifth year we’ve done these trainings and each time I pick up subtle points from the instructor showing his impressive expertise in the subject. This year’s subtle point that I picked up is about the hardest part of DO-254. The hardest part of DO-254 is the cultural change that needs to take place in order for the organization to successfully comply to DO-254. This can be the make or break of the project. It doesn’t matter if you have top-notch planning documents if no one will adhere to them. It doesn’t matter if you’ve written 1000+ page requirements document, but the verification engineers cannot use them because the requirements are not verifiable. It doesn’t matter if you have the best design standards if your designers would not abide by them. It doesn’t matter if you have the latest verification tools but no one in your team understands how to satisfy tool assessment and qualification. It doesn’t matter if you have the most comprehensive review checklists if your reviewers will not use them and document the review activities and results. DO-254 is a collection of industry best practices and all of its processes are tightly integrated, but it doesn’t matter if you have the DO-254 processes tightly in place if your team members will not abide by them. The hardest part of DO-254 is the cultural change that needs to be embraced by all team members. The cultural change is what can get you. Many organizations new to DO-254 are eager to jump on board and start applying DO-254 to their projects due to its high demand in the avionics industry. You might be ready to take the leap and make the cultural change yourself, but is the rest of your team and organization ready for the cultural change? If you’d like to learn more, or register for next year’s class, call us at 1+702-990-4400 or email training@aldec.com. For the rest of this article, visit the Aldec Design and Verification Blog. To Emulate or Prototype?May 23rd, 2016 by Krzysztof Szczur
It is true that FPGA Prototyping is more challenging than emulation. Yet, for the time invested in prototype setup, developers are rewarded with a validation platform that is capable of running orders of magnitude faster than emulation. |
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The DVCon Europe conference is certainly growing, and the methodology presented yearly continues to be more mature and ready to use. This year’s DVCon Europe was not thematically different from other conferences. Subjects like 
