Was DVCon India Really the Portable Stimulus Conference?

Over the last several blogs posts, we’ve twice previewed the very first DVCon India show, celebrating it as a sign of India’s ever-growing importance in the electronics industry. We also mentioned that our co-founder and CEO Adnan Hamid would be presenting in two tutorials and helping to staff our booth in the exhibition. Now that the event is over and Adnan has returned from his travels, we’d like to fill you in what turned out to be a great event.

We have heard nothing but positive comments from attendees, vendors, and organizers. The conference was well attended, full of strong technical content, and well run. Perhaps the dominant theme to emerge was the importance of the “portable stimulus” effort undertaken by Accellera and the solutions available to meet some or all of the vision. It may be a stretch to call DVCon India the “Portable Stimulus Conference” but surely the first day (Thursday) was “Portable Stimulus Day” and we’ll explain why.

Our friends at CVC coined this term in their excellent blog post about the show. They did a fine job describing the tutorial “Achieving Portable Stimulus with Graph-Based Verification” that was sponsored by Breker, CVC, and Mentor. Adnan presented the talk “Portable Tests with Graph-Based Scenario Models: Hopes, Dreams and Aspirations” to explain why graphs are a particularly good technology providing portable stimulus, checks, and coverage. We believe that the goal of the Accellera effort should be portable tests, with stimulus part of the solution.

We received much positive feedback on this session. Attendees appreciated three vendors standing together to present a common viewpoint on the industry need for portable tests and to provide strong technical arguments for why graph-based verification is the best solution. In fact, in this photo (courtesy of Mentor) you can see that three speakers were literally side by side as they answered questions from the audience at the end of the tutorial.

Adnan had a guest appearance in the tutorial “SoC Verification Challenges Offer Opportunities to Take a New Look at Debug” sponsored by CVC and Synopsys. This tutorial included a discussion of how the Synopsys Verdi debug solution can be integrated with other tools. Adnan specifically discussed how we have connected TrekSoC in this manner to provide “Seamless Debug from Graph Based Portable Stimulus Based Software Driven Tests to Verdi HW/SW and Waves.”

In addition, Adnan pinch-hit in a last-minute program change to present “Verification IP: Past, Present and Future” as part of the invited talks. He described how graph-based portable stimulus IP can close the loop between design and VIP verification, extending beyond stimulus to checks and coverage. As we have discussed before, the portability and reusability of graph-based scenario models makes them a natural extension to traditional design and verification IP.

So that made three sessions on Thursday with significant content related to portable stimulus. Actually, there were four, since the keynote address by Mentor CEO Wally Rhines touched on some of the same themes. And the momentum continued past the end of the technical program into the evening reception in the exhibition hall. Breker had a booth there where Adnan talked to a number of verification teams eager to learn more about portable tests and graph-based scenario models.

In summary, Thursday at DVCon India truly was Portable Stimulus Day. This reflects the importance of providing a better solution for verification reuse in the industry as well as the broad interest in Accellera’s efforts to work toward a standard. But it also reflects the emergence of India as a developer of chips as complex as any in the world and the intense need there for more automated and more thorough verification. We’ll share some more thoughts on this topic in a future post.

Tom A.

The truth is out there … sometimes it’s in a blog.

Tags: Accellera, Bangalore, Breker, Cadence, CVC, DV, dvcon, ESL, functional verification, India, mentor, portable stimulus, Synopsys, uvm

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