Sharon Hu - General Chair DAC55 and a professor in dept of CS and Engineering at Univ of Nortre Dame, Indiana
DAC55 General Chair, Sharon Hu is a professor in the department of Computer Science and Engineering at the University of Notre Dame, Notre Dame, Indiana, USA. Her research interests include low-power system design, circuit and architecture design with emerging technologies, hardware/software … More »
November 2nd, 2017 by Sharon Hu - General Chair DAC55 and a professor in dept of CS and Engineering at Univ of Nortre Dame, Indiana
My first time attending DAC was in 1991, and I am so excited to be serving as the General Chair for the 55th annual conference this June. Coming from academia and meeting new people in the industry sector who have been involved with DAC for years, I thought this to be good opportunity to introduce myself to the entire community.
I got my start in engineering as an undergraduate student. Both of my parents were engineers and encouraged me to pursue engineering as well. I studied electrical engineering and came to like it very much. Before making the jump into academia, I worked at the General Motors Research Labs for four years right after receiving my Ph.D. At that time, I was exposed to the emerging area of hardware-software co-design and really enjoyed it. Over time I began to realize that many factors in industry could constraint the choices of research projects that one can work on. When an opportunity came up, I decided to make the switch to academia. Currently, I am a computer engineering professor at the University of Norte Dame and love being able to work with students who are as interested in this field as much as I am. There is a drive for learning in these students, and I see the same passion when I attend DAC.
Now onto DAC 2018 and the task of being General Chair. We are a part of an industry that is changing and evolving, and DAC is a major part of the industry ecosystem and a large task for one person to manage as I have learned. Thankfully, I have been able to head a committee of people who are as passionate as I am. I’m proud to be working with such a talented and diverse group of volunteers from academia and industry that span many sectors including electronic design automation (EDA), design, embedded systems, intellectual property (IP) and semiconductors. You may be hearing from some of these folks over the next 10 months as we plan the overall program, so please take a look and welcome the 2018 Executive Committee (EC): https://dac.com/committees/executive.
The EC has a team building ritual during the first onsite planning meeting that is held each September. This year’s event was hosted by Cozy Meals in San Francisco. It was a wonderful night of getting to know each other by cooking together and sharing our culinary experiences. As I hoped we would, this group enjoyed the evening and shared many stories and laughter.
There are a number of things that I really like about DAC, but towards the top of that list is the format of the conference. There aren’t many places where research, learning sessions, and exhibitions co-exist. DAC’s wide range allows me to hear cutting-edge research results on a diverse set of topics while being able to interact with friends and colleagues from all over the world.
And speaking of topics, I’m very excited to have worked with the EC in expanding DAC’s topic areas for 2018. DAC has a perception in the industry to be an EDA software and chip design conference when in reality over the years DAC has grown its focus from chips to systems. This year’s topics, which will be incorporated in all aspects of the conference, will focus on
I encourage everyone to look closer at DAC’s call for contributions to understand how the conference has evolved over the past 55 years and see where you can be part of this expanding and educational event. The call for contributions is now open and we are looking forward to receiving submissions for regular research papers, special sessions, panels, tutorials and workshops. The deadline is November 21. Along with the research focused submissions, the Designer and IP Track submissions are open with a submission deadline of February 3, 2018.
As you can see, each year there are more opportunities to learn and keep up with the industry as it changes, this is another part of DAC that is so special. With the help of the EC, exhibitors, and attendees this year has the potential to be the best DAC yet.
May 30th, 2017 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
I’ve been attending DAC since 1992, and it’s astonishing to me how each new year brings more and more compelling experiences for attendees. Of course DAC is rooted in a world-class IEEE and ACM sponsored conference program, but the activities in the exhibit hall just get more and more amazing and fun every June.
The exhibit hall at this year’s DAC is not just a place where exhibitors from around the world will share leading-edge technologies. It’s going to be a hive of all sorts of activities—a magnet for all attendees.
Here’s a rundown of what you’ll experience in Austin, June 18-22.
May 12th, 2017 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
In case you missed it, we’ve announced our 2017 keynoters, a group that (including the luminaries giving SKY talks) gives you six more very good reasons to be in Austin the fourth week in June. All the information you need on the lineup is here. I know you are perhaps too busy to dig through this, so LMGTFY and share with you some highlights:
April 21st, 2017 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
We hear from media outlets that Internet of Things (IoT) solutions will be soon be surrounding us in our homes, our offices, our schools; in factories and farms; working to make our life better, or perhaps working to eliminate our species! Well, 50+ years has taught us that any new technology happens first at DAC, and adding credence to the media’s predictions, you will see IoT technology information and insights everywhere the 54th Design Automation Conference.
There is not some new job title of “IoT engineer.” Instead our familiar, experienced analog, mixed-signal engineers, RF engineers, server architects and mobile developers and verification teams are applying our tools and their skills in this new application area. Since IoT design elements touch most EDA engineering disciplines, we’ve made it easier for DAC attendees to learn what they need to know about IoT trends and technology wherever they are at the Austin Convention Center.
Here’s a sampling of IoT-related presentations that can be found in keynotes, SKY Talks, fireside chats, DAC Pavilion sessions and tutorials:
April 10th, 2017 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
A DAC winter meeting held in sunny Mexico isn’t what it’s cracked up to be. (Although we did enjoy the break from this winter storms!)
Everybody thinks the Executive Committee members are lounging on the beach enjoying drinks with little umbrellas in them. That couldn’t be further from the truth!
In fact I and 15 other EC members spent most of our February meetings in Puerto Vallarta in a windowless hotel conference room, refining the DAC program and finalizing the details of the big event in Austin, June 18-22.
The hard work of the technical program chairs comes together in rooms just like that one, during the winter of each year, as we knit together the fruits of months of labor by our sub committees to form a coherent program on the projection screen. This year’s program is benefitting big time from that hard work: It’s one of the most compelling I’ve seen in my 20+ years of either attending or being a part of DAC.
Each year it just gets better. Consider that this year the Designer Track has grown to 18 sessions, almost doubling in size in two years. This includes eight invited sessions, two panels, eight submitted sessions and more than 80 poster sessions. We had a record number of submissions for this year—149.
What else is in store for attendees? Plenty.
We put together 44 technical sessions, more than 130 research papers, 6 panels and 11 invited sessions spread throughout our seven main topic areas—Automotive, Design, EDA, Embedded Systems & Software, IoT, IP and Security. We.ve identified 16 sub-topic areas—from general business to circuit design to low power and reliability to test and verification—to help attendees better tune their experience based on their interests. Some broader areas, for example IoT, have papers spread throughout the program, whether it might be a poster session, an invited presentation, a keynote or a SKY Talk.
This valuable content—created by engineers for engineers—will be found throughout the Austin Convention Center. We’ll have content on the exhibit floor in the DAC Pavilion, in the hallways, meeting rooms on all floors; in short, all over the location.
Take a tour of the program here and start to tick off what you’re not going to want to miss. Me? I want to see the Monday afternoon panel Growing IC Design and Ecosystem in China, moderated by EE Times editor Junko Yoshida; Joe Costello’s Monday morning keynote, IoT: Tales from the Front Line; Tuesday afternoon’s RISC-V Implementation Considerations presentation; the Sunday DAC workshop on autonomous vehicles. I could go on, but you have your own interests, so check it out.
It’s easy to register too, and I hope to see you there. Maybe then we can have an umbrella-festooned cocktail or two!
Register for DAC at: https://dac.com/content/registration
March 6th, 2017 by Rob van Blommestein
You’ll notice something different when you walk into the Exhibit Hall at the Austin Convention Center this coming June. We are very excited to be featuring new suites from Freeman, one of the most innovative event-marketing vendors around. (Seriously, they do great work; browse their site for five minutes and you’ll see what I mean.)
Here are just a few of the upgrades that are in the works:
You’ll find most of the practical details on how to get started as an exhibitor here. (One pro-tip to know is that the new suites are measured in the metric system this year. I know you can handle it; we’ve been talking about nanometer-scale manufacturing process nodes forever, after. But keep that in mind when considering your floor plan, submitting materials and so on.) And you can always email Stacy Dilallo or Susie Horn, MP Associates for further information.
February 17th, 2017 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
When it comes keeping the growth of design productivity exponential, a key barrier that fell in the past ten years is due to the increasing use of social media, which set free the exchange of focused, expert knowledge, from user to user. On the web we have very helpful company-curated user forums; and often even better, the stack-exchanges which are user curated, where readers up-vote the most helpful content and as a result these are often the very best place to visit to get unstuck from a problem you recognize you have.
These forums and posts are all reactions against the underfunded, or poorly directed tech publishing team, tasked perhaps by marketing (or the simple desire to keep their employment) to only document what works; and never mention an alternative solution.
Of course a web search will also take you to the swampy places where all you find is others who are stuck with similar problems, and they just bemoan that the vendor doesn’t care, or take you through a litany of things they’ve tried that didn’t work. One also finds the beginning of tutorials, part one of what was to be a twenty volume tutorial where the blogger planned to impart the wisdom of the ages for how to build the magical thing – and only part one got written – and even that is now out of date.
So, search works great — when you have an idea what the problem is, and you are following a large crowd who has been there before, and they’ve taken the time to create hints.
Going hands-on at last year’s Designer/IP track session, with no marketeers in sight!
December 20th, 2016 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
Designer and IP track submissions are due Tuesday, January 24. These sessions have been among the most vibrant DAC elements in recent years based on attendance and anecdotal feedback. Chuck Alpert, my predecessor as DAC chair, explained why in a post last year: “Many of these technologists come for the Designer/IP track, a marketing-free zone aimed squarely at practitioners.”
The good news is that submitting is easy. All you need to do is bang out 100 words and six slides. You can do this, people!
More good news is the excellent industry pros in charge of these tracks.
November 10th, 2016 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
Time is the only critic without ambition. – John Steinbeck
Like many things, DAC looks decidedly different depending on where you sit, and how you experience it. As an attendee, it’s mostly a few days at the start of every summer where you can sample some of the best technical content on the design of circuits and systems, plus get the chance to network and have some fun with a worldwide audience that spans execs to undergrads. In contrast, as a member of the executive committee, DAC is the finish line for a year-long marathon effort to bring the best content, speakers and papers all together in one place and time, building on what works and improving where we can.
Now is the time for a reminder that if you want present a paper at DAC (especially a research paper), the 12-month calendar matters for you as well. Abstracts are due Nov. 15; manuscripts, Nov. 22!
October 6th, 2016 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
I’ve been attending DAC as an exhibitor since 1992, and serving on the executive committee since 2012. I am thrilled to serve as General Chair for the 54th iteration of this grand conference. (And no it’s not too early to think about DAC; the call for contributions is open now.) Through the years I have seen some big industry changes, most driven by the increasingly powerful tools and automation that this conference has been about — growth that fueled my career, as well!
My first job was as a chip designer at TRW, Sunnyvale back in the 1980s, and we had our own fab in Virginia, and my officemate wrote and maintained our chip design tools, as was pretty typical in those days. I worked at a series of hardware startups after that; and then took all that experience in hand to build better chip design tools. At Chronologic I led the engineering team that built the VCS simulator; then I started Surefire, where we built the SureCov and SureLint verification tools; we merged with Verisity and then into Cadence, where my team developed C-to-Silicon synthesis tools. If you’re curious, LinkedIn has most of the rest of the story, including the patents I’ve been issued.