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Monday, January 14th, 2013
Tags: 3D ICs, EDA, Electronic Design Automation, EUV, IP, Lithography, Paul McLellan, semiconductors, SemiWiki
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Thursday, February 9th, 2012
Tags: 2.5D, 2012, 3D, 3D stacked die, Ansys, Atrenta, Cadence, Dassault, Double Patterning, EDA, EDA & IP, eda 2 asic Consulting, EDA DesignLine, EDA360, EdXact, Electronic Design Automation, Engineering & Technology, FPGA, Invarian, investment, IP, Lee PR, Lithography, low power, Low Power Design, Low-Power Design Blog, Magma, Maxfield High-Tech Consulting, Mentor, Needham, New Electronics, Programmable Logic, Programmable Logic DesignLine, publishing, Semi-wiki.com, Semiconductor IP, semiconductors, Si2, SoC, SoC Realization, social media, software, Standards, Synopsys, System on Chip, Tech Design Forum, textbooks, www.leepr.com
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Wednesday, February 1st, 2012
Tags: 2012, Ansys, Apple, EDA, EDA & IP, Electronic Design Automation, Finance, foundries, Global Foundries, Intel, investment, IP, Lee PR, Needham, Samsung, Semiconductor IP, semiconductors, SoC, System on Chip, TSMC, www.leepr.com
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Monday, January 30th, 2012
Tags: 2012, ARM, circuit-design, EDA, EDA & IP, Electronic Design Automation, Engineering & Technology, EUV, Lee PR, low power, Low-Power Design Blog, multiple patterning, New Electronics, NVIDIA, semiconductors, Tech Design Forums, Tegra 3, www.leepr.com
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Wednesday, January 25th, 2012
Tags: 2012, ASIC, EDA, EDA & IP, EE Times, Electronic Design Automation, FPGA, Lee PR, low power, Maxfield High-Tech Consulting, Programmable Logic, Programmable Logic DesignLine, publishing, semiconductors, SoC, software, SRAM, System on Chip, textbooks, www.leepr.com
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Tuesday, January 24th, 2012
Tags: 2.5D, 2012, 3D, 3D stacked die, EDA, EDA & IP, eda 2 asic Consulting, Electronic Design Automation, IC Design, Inc., Lee PR, semiconductors, Standards, www.leepr.com
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Monday, January 23rd, 2012
Tags: 2012, EDA, EDA & IP, EdXact, Electronic Design Automation, Lee PR, Magma, Parasitics, semiconductors, Synopsys, www.leepr.com
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Thursday, January 19th, 2012
Tags: 2.5D, 2012, 3D, 3D stacked die, EDA, EDA & IP, Electronic Design Automation, I/0, Lee PR, semiconductors, Si2, Standards, TSV, www.leepr.com
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