Open side-bar Menu
 Aldec Design and Verification

Posts Tagged ‘HDL’

Zynq-based Embedded Development Kit for University Programs

Tuesday, October 17th, 2017

Creativity and innovation, which lead the society to success, rest on the foundational institutions such as schools and universities. They provide fertile soil to seed, grow and flourish enterprises. To harvest more within an industry, the ecosystem needs to be enriched where the seeds are grown. Considering that the university’s courses are the nutrition to student, they need to be designed in a productive manner as they will provide the next generation of engineers. By providing the necessary platform in addition to the rich and informative tutorials, the quality of the input information for students would be assured. Particularly in the field of Electrical and Computer Engineering, it is important that students get as much hands on experience as possible, and tackle design challenges – such as HW/SW co-design and co-verification – before entering the job market; for their own benefit as well as the industry as a whole.

In this blog, you will become familiar with the TySOM Education kit (TySOM EDU) package designed for the university courses related to hardware design and embedded system design researches.

The TySOM EDU contains a TySOM embedded development board, Riviera-PRO advanced hardware simulator and informative tutorials and reference designs. Although it is possible to choose any development board from the TySOM embedded development board family, the TySOM-1A-7Z010 would be the most cost-effective solution for most university projects.

TySOM-1A-7Z010 (ZynqTM) is a ready-to-use and feature-rich embedded development board which provides the required peripherals to tackle both basic and advanced Zynq-based projects. The XC7Z010 is based on the Xilinx® All Programmable System-on-Chip (SoC) architecture, which integrates a dual-core ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. Coupling the device to a rich set of peripherals for connectivity, communication and multimedia, makes this board ideal for university projects requiring HW/SW co-design.  For the rest of this article, visit the Aldec Design and Verification Blog.

It’s no accident that Aldec offers the best VHDL-2008 support

Wednesday, December 11th, 2013

Here at the Aldec corporate office, we have a sign that reminds us all of our mission in the field of Technology. It reads, ‘To deliver solutions that provide the highest productivity to value ratio; supporting our existing products while delivering innovation to current and new technologies’. We have similar statements to reaffirm our commitment in the areas of Research, Alliances, and Culture – we call it our “Aldec DNA”.

Because we genuinely want to have a clear understanding of our user’s requirements and methodology preferences, we continually engage in surveys and interviews.  The knowledge we gain better positions us to support our existing products and to deliver that support where it matters the most to our users. If you’ve ever had that frustrating experience where your favorite tool no longer supports your methodology of choice – then you understand why this is so important.

Our Commitment to the VHDL Community

When it comes to VHDL-2008, we have learned from our customers that many are happy using the methodology – and continue to successfully deliver cutting-edge technology with it. So, while we remain committed to delivering innovation to new technologies, our R&D teams also invest a great deal of development time to ensure that Aldec solutions continue to offer a high level of support for popular languages like VHDL.

For the rest of this article, visit the Aldec Design and Verification Blog.

90’s Kid Active-HDL Celebrates Sweet 16

Wednesday, August 28th, 2013

As the proud Product Manager of Aldec’s  FPGA Design Simulation solution,  I am excited (like it was my first Cranberries concert) to announce that Active-HDL™ is celebrating 16 years since its initial release in 1997. Active-HDL has not merely stood the test of time, it has dominated the FPGA market like a Hulk Hogan smackdown with powerful simulation performance and debugging tools.

The key to Active-HDL’s long-term success lies in Aldec’s customer-centric philosophy. Simply put, we really do listen closely to our users and invest heavily in our tools. For this reason, continued simulation performance optimizations from release to release enable users to benefit from Active-HDL’s faster simulation even as the size of FPGA designs continues to grow.

(more…)

Leverage Hardware Acceleration for Faster Simulation

Wednesday, July 24th, 2013

Breaking the Bottleneck of RTL Simulation

Utilizing hardware acceleration in a System-on-Chip verification cycle can speed-up HDL simulation runs from 10-100x, while providing the robust debugging available from an RTL simulator. Acceleration (also referred to as Co-Simulation) combines the speed of FPGA-based prototyping boards, by offloading resource hungry modules into the FPGA, while non-synthesizable constructs of the testbench remain in the RTL simulator.

(more…)

Wait….Did you say HDL Editor?

Monday, June 24th, 2013

Productivity Boosting Features
Yes I did, but with no intention to start a holy war on which HDL editor is best. When it comes to HDL editors, each engineer has their own choice and I am not attempting to hurt any madly, deeply felt sentiments. My goal is only to bring the awareness to those using the HDL editor built into Active-HDL™ and to help them use it more efficiently.

There are two main categories for HDL editors (1) general purpose text editors, and (2) integrated text editors. Both have their own pros and cons, and in the end it is for each engineer to decide which suits their needs.

The HDL editor built into Active-HDL falls under the second category of integrated text editors. It offers many basic features (syntax highlighting, templates, columns selection, code folding, auto-formatting) as well as semantic features (code navigation, on-the-fly error detector), and also offers seamless integration with the simulator and version control system. The HDL editor in Active-HDL can be used with VHDL, Verilog, SystemVerilog, SystemC, C/C++, PSL, OVA, Perl scripts and Tcl scripts.

(more…)




Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise