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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

Attending DVCon: Read this first …

February 24th, 2016 by Peggy Aycinena

Emulation is everything in verification today
and therefore at the center of DVCon. Technology expert, Lauro Rizzatti, has prepared this brief tutorial for you, so you’ll be ready for the conference that starts on February 29th.

* The Past

Hardware emulation has been around for 3 decades. It started in the mid 80s with pioneers like Quickturn and Ikos, who used off-the-shelf FPGAs in the fabric of their emulators. The second decade saw the rise of several startups, some of them using custom silicon devices in the emulators.

Toward the end of the second the decade, consolidation left only 3 players on the market: Mentor and Cadence promoting custom-based emulators, and EVE using commercial FPGAs. In the third decade, Synopsys acquired EVE.

Over the past 30 years, the emulation technology evolved in two directions: hardware and software.

On the hardware side, all emulators expanded design capacity, improved execution speed and compilation speed, provided 100-percent visibility at run-time without compiling probes, added multi-user capabilities and increased the system reliability.

On the software side, emulators became easier to use, their usability improved, they expanded the deployment mode beyond in-circuit-emulation (ICE), and they supported remote access. The cost of emulators measured on a per-gate-basis, historically very high and a barrier to entry, has decreased dramatically to the point where pricing is about a penny per gate.

Once limited to large corporations developing very large digital (not analog or mixed-signal) designs such as processor and graphics – by the end of the third decade, emulators had been adopted by most segments of the electronics industry.

* The Present

Today, all three main EDA players offer emulators, although each is based on a unique architectural approach (Cadence, custom processors; Mentor Graphics, custom emulator-on-chip; Synopsys/EVE, commercial FPGAs) that can be used in several modes of deployment and can perform a multitude of verification tasks.

Emulators are being used to address everything from hardware verification to hardware/software integration, system validation, functional coverage analysis, low-power verification, power estimation, design-for-testability [DFT] fabric and test vector verification, performance characterization, and more.

The setup time, once a drawback that prevented or hindered the adoption of the technology, is now in the order of one or few days. Virtually all segments of the electronics industry use or can use emulation today.

Emulation is considered a high-value resource, able to alleviate unnecessary risk. As a result, it is considered cost-effective with an easily justified ROI.

* The Future

Emulators will continue to increase in capacity, speed, versatility, usability, and deployment modes.

Now seen as main stream verification tools, emulators will be tightly integrated into a suite of verification engines, sharing a common compiler (or at least a common front-end compiler), a common GUI, and a common database.

Undefeated by designs sizes, emulators will be used more and more in ICE, acceleration, system validation, functional coverage, SystemVerilog assertions, low-power verification, power estimation, DFT and test-vector verification, and performance characterization.

Finally – to further increase the ROI, emulation access will be increasingly offered via large data centers.


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