Dream Catcher: Synopsys’ FPGA-based Prototyping

This week, Synopsys announced its HAPS-80 FPGA-based prototyping systems, which  the company says “delivers up to 100 MHz multi-FPGA performance and high-speed time-domain multiplexing technology.”

Johannes Stahl, Synopsys Director of Product Marketing for Prototyping, told me in a phone call related to the announcement that when it comes to physical prototyping, “things are breaking.” Which is why, per Stahl, Synopsys is fulfilling the dreams of its customer base with these new HAPS-80 systems, fully integrated systems that address the biggest problems in prototyping.

Asked to list those problems, Stahl said, “First, prototyping is always better when the software is integrated closely with the hardware. We have achieved this integration with our new announcement.

“Second, where the debug feature used to be an afterthought, this is no longer the case. Our new systems have the debug capability built-in.

“Third, our customers meed prototyping performance that can run many stacks very fast, and we’re now delivering that capability. The new systems have been optimized for efficiency and are [characterized] by the ability to map a design to multiple FPGAs quickly.

“Fourth, earlier prototyping systems had the capacity to handle up to 288 million gates, but in our new systems we can handle systems up to 1.6 billion gates.”

That’s a very big number, I said, and Stahl agreed: “Yes, that’s a very big number and you should be impressed. Of course, not all customers need that capacity, but for those who do, it’s now available.

“And fifth, as far as turn-around-time is concerned, the new systems have a humongous capacity, along with improved synthesis technology. Now several turnarounds [can be completed in a single day].”

I asked if Stahl could have foreseen, even 15 years ago, the speed and capacity that would be available in FPGA-based prototyping systems today.

He said, “The answer is no, but there has been a very important driving force for all of this progress –  the dream of a fully implemented software prototyping system that could also meet the needs of customers who could not afford debug problems in their designs. We believe that with our new HAPS-80 release, we’re making both of these dreams come true.”

“Now,” he added with a chuckle, “creating a physical implementation of a design prototype has been reduced from something like a wrestling match to something more like a ping-pong match.”

Is all of this progress based mainly on improvements in FGPA technology, I asked.

Stahl said, “It’s true, the FPGA vendors are providing better hardware with better I/O capability – we can [now handle] up to a thousand signals in a design – but it’s not the FPGA technology that has been the game changer.

“It’s the simplicity now available with the complete integration of our HAPS-80 systems. We sincerely believe this integration is our competitive advantage, and that these systems are poised to change the FPGA- based prototyping market landscape forever.”

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September 16th Press Release …

Synopsys announces the HAPS-80 systems, which deliver up to 100 MHz multi-FPGA performance and new proprietary high-speed time-domain multiplexing (HSTDM) technology.

HAPS-80 with ProtoCompiler design automation and debug software uses the latest Xilinx Virtex UltraScale VU440 devices with 26-million-ASIC-gates capacity per FPGA, supporting designs up to 1.6 billion ASIC gates. The combination of HAPS hardware and ProtoCompiler software significantly accelerates software development, hardware/software integration and system validation.

ProtoCompiler software, which has built-in knowledge of the HAPS system architecture automates partitioning and enables an average time to first prototype of less than two weeks and subsequent compile iterations in hours compared to non-integrated prototypes. ProtoCompiler takes advantage of HAPS-80’s new HSTDM capabilities to automatically select the optimum mix of pin-multiplexing schemes to best match the design under test.

The integrated HAPS-80 solution delivers performance of up to 300 MHz for single FPGA designs, up to 100 MHz for multi-FPGA without pin-multiplexing and up to 30 MHz for multi-FPGA with new proprietary high-speed pin-multiplexing.

The increased system performance of the HAPS-80 systems enables OS booting to the command prompt in less than a minute, allowing designers to probe and initialize device hardware such as CPU, timers and UARTs. HAPS-80 also enables at-speed operation of real world I/O.
HAPS-80 systems deliver superior debug visibility and automation through always available HAPS Deep Trace Debug Gen4 (DTD4) technology, providing the ability to capture more than 1000 debug signal bits per FPGA at speed.

The HAPS Universal Multi-Resource Bus (UMRBus) host connectivity enables hybrid prototyping, global accessibility and prototyping farm use models, [as well as] seamless connection between HAPS-80 systems and Synopsys’ Virtualizer-based virtual prototypes to create an integrated hybrid prototyping environment for early software development and hardware/software integration.

John Koeter, VP of Marketing for IP and Prototyping at Synopsys, is quoted: “The new HAPS-80 series addresses SoC designers’ pain points in the areas of performance, scalability, time to first prototype and debug, while maintaining interoperability with HAPS-70 systems

“The unique combination of HAPS hardware and ProtoCompiler software delivers the fastest time to first prototype with the highest performance to accelerate software development, hardware/software integration and system validation of large
SoC and GPU designs.”

Hanneke Krekels, Director of Test, Measurement and Emulation Market Business at Xilinx, is also quoted:”Synopsys has used six prior generations of Xilinx FPGA devices and is a long-term business partner of Xilinx for FPGA-based prototyping.

“Synopsys’ tightly integrated hardware and software HAPS FPGA-based prototyping solution is positioned to deliver the highest performance and capability from the Virtex UltraScale VU440 device. UltraScale devices deliver a 2.2x increase in device density and 21 percent more I/O, which are ideally suited for the multi-FPGA partitioning of complex SoCs prototyped with HAPS systems.”

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Tags: FPGA-based prototyping, Hanneke Krekels, HAPS-80, Johannes Stahl, John Koeter, Synopsys, Xilinx

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