Archive for September, 2012
Thursday, September 27th, 2012
If you knew Phil Kaufman, you would have known how old he was when he died. Brief details of his life can be found through searching online: His last post was CEO of Quickturn, he died while on a business trip to Japan in July 1992, and the EDA Consortium established the Kaufman Award in his honor the following year.
This information is all readily available, but Phil Kaufman’s age at the time of his death is not so easily found. And why would that information be important?
By all reports, Phil Kaufman died of a heart attack, yet clearly he was fully engaged in his career at the time, which indicates his sudden death came as a shock to his family and colleagues. Did he know he had a problem? Did he have a history of cardiac disease? Was he being tracked by a doctor? Was the stress of the job just too much for someone whose health was compromised? I didn’t know Phil Kaufman, so I don’t know the answers to any of these questions.
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Tags: cardiac health, CEDA, EDA, EDAC, Hermann Gummel, Keith Lobo, Phil Kaufman, Quickturn No Comments »
Thursday, September 20th, 2012
This week the iPhone 5 goes viral as millions queue up to buy the latest and greatest from Apple. No small amount of ink has been spilled in the period leading up to the September 21st release detailing everything known [and/or presumed] about the product:
The supply chain [sophisticated & complex], the package [thinner], the screen size [bigger], the connector size [smaller & backwards incompatible], the case [which providers have accurately predicted the form factor], the manufacturing [more distributed], the apps [kludgey Maps], the business implications [a possible uptick in the U.S. GDP based on sales volume], the marketing [a juggernaut], and of course, the A6 processor [a precedent setter].
What’s not heard amidst any of these billions of word about the iPhone 5 is which EDA tools were used by the Apple team to design the chip(s) at the heart of the thing.
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Tags: Apple, EDA, iPhone 5, Linley Gwennap 1 Comment »
Thursday, September 13th, 2012
Samsung Venture Investment Corp. has just put $4 million into Carbon Design Systems in conjunction with the debut of a new strategic partnership between the two companies.
Per the September 12th Press Release: “Funds from the strategic investment will be used as working capital and will support Carbon’s ongoing development of leading tools in the ESL design space, including its fast, accurate virtual prototypes. Initiatives will be undertaken to expand the reach of Carbon’s fast, accurate virtual prototypes.”
I spoke with Bill Neifert, Carbon’s founder, CTO and VP of Business Development on the day of the announcement. He was amazingly relaxed, a clear indication that the Samsung-Carbon partnership is a logical outcome of a long-term relationship between the organizations:
“Samsung been a heavy user of our tools for quite some time, and has been looking for ways to take even more advantage of that situation – to speed up product introductions, something that everyone’s trying to do in that marketplace.
“Today’s announcement is part of a Samsung initiative to advance their SoC design methodologies. They have both the resources and expertise today to innovate and are looking to us to help them with that. This is also a nice partnership for us, of course. It will help us share our methodology in a broader fashion.”
I asked if Samsung’s investment will jettison Carbon into an even better market position.
Bill said, “Yes, but this is a true partnership. It’s not just about money for Carbon, but about having additional access to Samsung’s time, expertise, and technology. Samsung wants to make better products, and enhancing our technology will also expand their customer base.”
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Tags: ARM, Bill Neifert, Cadence, Carbon Design Systems, Carbon IP Exchange, Denali, Mentor, Synopsys, Virtual Prototyping 2 Comments »
Wednesday, September 12th, 2012
This is a great story: Oski Technology decided to prove the validity and efficiency of Formal Verification, and proposed a public challenge for themselves at DAC – a 72-hour window of time in San Francisco whereby they would attack a design problem never before seen, analyze it, propose a verification plan, and execute on that plan between 5 pm on DAC Sunday and 5 pm on DAC Wednesday.
To get a design problem, Oski Technology put out a request for proposal to different companies. The design could be at any stage in development, but had to include the RTL and some level of specifications for what the architecture should do, as well as some simulations.
Among the 5 respondents, Nvidia’s suggested problem was the most appropriate: It was a design that was still not complete and needed verification. More importantly, Nvidia was not afraid to have possible bugs or flaws in the design made public, a sign of their own confidence. So at 5 pm on Sunday, June 3rd, the Oski Technology team opened the files provided by Nvidia.
I’ll let Vigyan Singhal, Oski Technology’s President and CEO, take the story from there in his own words. Vigyan and I spoke by phone on September 12th, the same day a 6-minute video of the whole process was made available by the company. [Here’s the link on YouTube.]
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The challenge …
Per Vigyan Singhal: “We had gotten the design in advance from the verification manager at Nvidia, but couldn’t even look at the documentation until 5 pm on Sunday, let alone the RTL files. Then after we opened everything, we looked at the code and the design specifications and went from there.
“Initially during the first night and the next morning, we were mostly doing planning. As we learned more about the design, as is usual with this type of thing, we found some unexpected things. Some of the sub-modules were missing from the design. Nvidia had given us the simulation waves, however, so we could guess the functionality and from there wrote Verilog for those little modules.
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Tags: 72-hour Verification Challenge, DAC 2012, formal verification, NVIDIA, Oski Technology, Vigyan Singhal No Comments »
Wednesday, September 5th, 2012
There are thousands of companies based in Silicon Valley, but not all of them focus on the long-term play. Valin Corp. does have that focus, however, intentionally balancing their product portfolio across a range of industries, and investing in their employees with equal intensity.
Company President & CEO Joe Nettemeyer told me in a recent phone call that this strategy has allowed Valin to grow non-stop over the last half-decade: “We’ve achieved growth through a combination of internal development and acquisition, averaging 20-percent growth or more, per year, over the last 5 years, even in spite of a slight hiccup in 2009. We like to invest in industries that are counter-cyclical to each other. When there’s a slow-down in one area, we can cover the slack with revenue in another.
“We’re an infrastructure company working in the wafer-fab-equipment end of the semiconductor industry, designing and building system solutions for companies around the world that make semiconductor-based products. We just completed a project with AKT that makes equipment for large flat-screen panels to retrofit 30 systems for Samsung.
“We’ve also expanded our capabilities in other industries over the years, particularly as a strategic global distributor for Applied Materials. We’re recognized as one of the top 40 industrial distributors in the nation based on our sales revenue, and have just been recognized as one of INC Magazine’s 500/5000 fastest growing companies in America.
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Tags: AKT, Apple, Applied Materials, Emerson Electric, Intel, Joe Nettemeyer, Samsung, TI, TSMC, Valin Corp. No Comments »
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