Posts Tagged ‘IoT’
Wednesday, April 13th, 2016
I expect that the activities of the EDA Consortium (EDAC), our industry’s main trade organization, are followed more closely by EDA vendors than users. However, some of you may have seen the recent publicity surrounding the organization’s name change to the Electronic System Design Alliance (ESDA). I applaud this move because it reflects the gradual but ongoing merger of EDA and embedded systems, a topic that we have covered here on The Breker Trekker in the past.
However, I do have two reservations about the specifics of the name change. First, as some people have pointed out, “ESD” is strongly associated with “electrostatic discharge” for us engineers who have worked on actual lab benches and not just in the world of abstract EDA models. But that’s a minor quibble as far as I’m concerned. My bigger issue is that EDAC did not use the name change as a chance to expand from “design” to “development” in its description of scope. Please continue reading as I expand a bit on all three of these points.
(more…)
Tags: Bob Smith, Breker, dac, Design Automation Conference, EDA, EDA Consortium, EDAC, embedded systems, ESD Alliance, ESDA, functional verification, graph, graph-based, hardware, IoT, portable stimulus, scenario model, simulation, SoC verification, software
4 Comments »
Tuesday, April 5th, 2016
We try to cover a variety of topics here in The Breker Trekker blog, focusing on technical information but mixing in some general industry analysis as well. Two of our most popular posts of all time have involved the annual semiconductor supplier rankings from IHS, Inc. and the large amount of semiconductor industry merger and acquisition (M&A) activity over the last few years. IHS released their 2015 results yesterday, so it’s time for an update on both of these topics.
Let’s start by catching up on the M&A front. When we last covered this topic in January, the acquisition of Freescale by NXP and the acquisition of Altera by Intel had both just completed late last year. These closed in time to be reflected in the 2015 supplier rankings. There were several other deals from 2015 that were still pending and, while some of them have now closed, their effects will not be seen until the 2016 results are in.
(more…)
Tags: Altair, Altera, Apple, Avago, Breker, Broadcom, Cisco, EDA, Freescale, functional verification, Hynix, IHS, Infineon, Intel, Internet of Things, IoT, Leaba, Marvell, MediaTek, mentor, Micron, NVIDIA, NXP, ON, Qualcomm, Renesas, Samsung, SanDisk, semiconductor, Skyworks, SoC, SoC verification, Sony, STMicro, Texas Instruments, TI, Top 20, Toshiba, Western Digital
No Comments »
Wednesday, March 30th, 2016
For those of us who have been in the EDA business on one side or the other (or both), the Design Automation Conference (DAC) is one of the highlights of every year. I almost hate to admit it, but this year holds DAC number 29 for me. I’ve been to San Francisco, San Diego, Los Angeles, Anaheim, Las Vegas, Dallas, New Orleans, and Orlando, most of them multiple times. But one of the most fun locations was Austin, where DAC was held for the first time three years ago, and where we will return in just a few short months.
There will be plenty of time later for us to fill you in on what Breker will be doing at DAC this year. Since the program for the 53rd annual conference just went live, I thought I’d share some initial impressions and predict some likely highlights. Of course as an exhibitor I’m already deep in planning for the show, but I encourage all of you to review the program and start making your own plans. You’ll be sure to have lots of fun in Austin, and on the basis of the information available today I’m sure that this will be a great show.
(more…)
Tags: Accellera, austin, Breker, cache coherency, cloud, dac, Design Automation Conference, EDA, functional verification, graph, graph-based, IoT, NoC, portable stimulus, scenario model, simulation, SoC verification, uvm, VIP
No Comments »
Wednesday, January 27th, 2016
Some of the highest readership here at The Breker Trekker happens when we post articles about the state of the semiconductor industry or EDA industry. It’s been a while since we looked inward at our own industry, but we have had a series of very popular posts about the ongoing changes in the semiconductor market, including the “merger mania” of the last few years. Although not all closed, in 2015 alone there were several dozen offers totaling well over US$150B.
Since semiconductor vendors are the main customers for EDA, with their customers the remainder of our market, we track both industries very closely. In last week’s post, we looked what the ongoing merger and acquisition (M&A) activity means for Silicon Valley. Our friend Graham Bell at Real Intent added a comment wondering about the impact of this M&A on the EDA industry. Today’s post contains some of our thoughts on this matter.
(more…)
Tags: acquisition, Breker, chip, Cypress, EDA, functional verification, IC Insights, Intel, Internet of Things, IoT, M&A, merger, semiconductor, Silicon Valley, SoC, SoC verification, Top 20
No Comments »
Wednesday, January 20th, 2016
As someone who has lived in the heart of Silicon Valley for more than 30 years, I’m used to the regular cries that we’re losing our innovative edge. Every few years something happens to cast some doubt on our future: a stock market crash, a major company moving elsewhere, or a lot of press about some new Silicon Forest/Glen/Mountain/Prairie/Island/Whatever trying to beat us at our own game.
Sure, we face plenty of challenges. A recent article on SemiWiki painted a rather cautionary view of today’s Silicon Valley. But there’s good news too. Silicon “Valley” has grown to include San Francisco and much of the Bay area, with corresponding growth in technology employment and impact. Today, I’d like to springboard from a recent post on semiconductor mergers and acquisitions to consider one particular aspect of the current role of Silicon Valley.
(more…)
Tags: acquisition, Breker, chip, Cypress, EDA, functional verification, IC Insights, Intel, Internet of Things, IoT, M&A, merger, semiconductor, Silicon Valley, SoC, SoC verification, Top 20
2 Comments »
Tuesday, January 12th, 2016
Last week the International Consumer Electronics Show returned to Las Vegas, where it has been a major event for nearly 40 years. Nearly everyone calls this show CES, to the extent that its home page doesn’t even tell you what the acronym means anymore. So CES it is, one of the largest and best-known technology-oriented conferences in the world. Its sheer size makes it a test of stamina for exhibitors and visitors alike.
When people think of CES, they think of wandering the aisles and being overwhelmed by all the cool products on display. From massive HDTV screens down to the smallest Internet of Things (IoT) devices, this show appears to have it all. It seems to me, however, that CES has evolved into an event that’s almost as much about the underlying silicon as it is above the consumer-oriented end products. I’d like to explore that idea in today’s post.
(more…)
Tags: Breker, Broadcom, CES, Consumer Electronics Show, Cypress, EDA, EZchip, functional verification, Intel, Internet of Things, IoT, Marvell, MaxLinear, Omnivision, Qualcomm, semiconductor, Sigma Designs, SoC, SoC verification, system-on-chip, Texas Instruments, TI, Toshiba
No Comments »
Thursday, October 22nd, 2015
One of the most interesting events I attended last year was the 2014 Silicon Valley IP Users Conference, organized and presented by IPextreme and their Constellations program partners. It was a wonderfully well-organized day, with excellent speakers in the fun environment of San Jose’s Winchester Mystery House. On Tuesday of this week, I attended the 2015 version of the conference and once again was impressed by both the technical content and the networking opportunities.
This year we were nestled in the foothills of Los Gatos at the historic Testarossa Winery, coincidentally on the same day that Manresa Restaurant just down the street was awarded its third Michelin star. With a wine tasting after the presentations, we were all in a celebratory mood. I was most intrigued by the panels, so I’d like to devote today’s post to a summary of some of the more interesting points I heard and what they might mean for the semiconductor industry, the EDA industry, and Breker.
(more…)
Tags: Accellera, Breker, DV, ESL, functional verification, IoT, IP, IPextreme, portable stimulus, SoC, SoC verification, uvm, VIP
No Comments »
Wednesday, October 7th, 2015
Earlier this year, we published an analysis of the semiconductor landscape that became one of the most-read posts in the history of The Breker Trekker. That’s not too surprising, since business topics tend to have wider appeal than detailed discussions about verification techniques. That post focused on the top 20 semiconductor companies and the many changes in that list over the last 15 years. We mentioned a number of noteworthy mergers, acquisitions, and spin-outs that contributed significantly to the dynamic nature of the market.
The first three quarters of this year have seen a huge uptick in merger and acquisition (M&A) activity among semiconductor companies. Although many of these deals have involved second-tier players, at least a few are significant enough to result in changes to the next Top 20 listing. Since we follow the chip industry closely, we thought we’d summarize some of the recent announcements and speculate a bit on what it all means.
(more…)
Tags: Altera, Avago, Breker, Broadcom, chip, EDA, EZchip, Freescale, functional verification, Hynix, IC Insights, IHS, Intel, Internet of Things, IoT, iSuppli, LSI, Marvell, MediaTek, Mellanox, mentor, Micro, Micron, MStar, NVIDIA, NXP, PLX, PMC-Sierra, Qualcomm, Renesas, semiconductor, Skyworks, SoC, SoC verification, Top 20
No Comments »
Wednesday, January 7th, 2015
Late last year, we published a series of blog posts discussing how the world of large chip designs is moving toward multi-processor, cache-coherent SoCs. This trend is due to several sub-trends, including the addition of one or more processors, the growth in number of processors, the use of shared memory, and the addition of caches to improve memory performance. The result of this movement is clear: large chips are becoming more difficult to verify than ever.
Verification teams face challenges at every turn. It’s hard to run a complete SoC-level model in simulation, especially if the team wants to boot an operating system and run production applications. This may be feasible in emulation or FPGA prototyping platforms, but these cost a lot of money. What we’re starting to see is the truly stunning trend that some teams are taping out SoCs without ever having run the entire design together. This means that full-chip verification and debug isn’t happening until first silicon is in the lab. Let’s explore why this is happening.
(more…)
Tags: Breker, cache, coherency, DV, functional verification, IoT, IP, portable stimuls, SoC, SoC verification, TrekApp, TrekSoC, TrekSoC-Si, uvm, VIP
No Comments »
Thursday, December 11th, 2014
Few electronics-related topics have been more widely discussed in the past year or so than the prospects for the so-called Internet of Things (IoT), sometimes called the Internet of Everything (IoE). Hardware and software vendors have been falling all over themselves trying to ride the presumed IoT juggernaut. EDA has not been immune. In its roundup of attendee feedback from this year’s Design Automation Conference (DAC), the DeepChip site quoted a user saying, “The ubiquity of IoT. After 6 hours into DAC, I was ready to slap the next vendor who used that buzzword.”
The trumpeting of IoT was even greater at ARM TechCon, not surprising because of its focus on embedded systems. Here at Breker, we’ve used the term sparingly because it’s not really clear exactly what the IoT will become. Certainly there will be many more nodes of all sorts connected to the Internet in coming years, but there are numerous open questions. Our main interest is whether the IoT will result in an explosion of new SoC designs, and hence a broader market for our verification solutions. This blog post doesn’t provide a firm answer since none is possible yet, but it’s a topic worth addressing.
(more…)
Tags: ARM TechCon, Breker, dac, EDA, functional verification, graph, IoE, IoT, reuse, scenario model, SoC verification
No Comments »
|
