Posts Tagged ‘EDAC’
Wednesday, April 13th, 2016
I expect that the activities of the EDA Consortium (EDAC), our industry’s main trade organization, are followed more closely by EDA vendors than users. However, some of you may have seen the recent publicity surrounding the organization’s name change to the Electronic System Design Alliance (ESDA). I applaud this move because it reflects the gradual but ongoing merger of EDA and embedded systems, a topic that we have covered here on The Breker Trekker in the past.
However, I do have two reservations about the specifics of the name change. First, as some people have pointed out, “ESD” is strongly associated with “electrostatic discharge” for us engineers who have worked on actual lab benches and not just in the world of abstract EDA models. But that’s a minor quibble as far as I’m concerned. My bigger issue is that EDAC did not use the name change as a chance to expand from “design” to “development” in its description of scope. Please continue reading as I expand a bit on all three of these points.
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Tags: Bob Smith, Breker, dac, Design Automation Conference, EDA, EDA Consortium, EDAC, embedded systems, ESD Alliance, ESDA, functional verification, graph, graph-based, hardware, IoT, portable stimulus, scenario model, simulation, SoC verification, software
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Tuesday, November 3rd, 2015
The long-established trade association EDA Consortium (EDAC) has started several new initiatives to extend its membership to IP suppliers and to offer more value to its members through new programs. New EDAC Director Bob Smith has a bunch of innovative ideas and I have little doubt that they will breathe new life into the organization. I had the pleasure of working with Bob when he did some consulting for Breker several years ago, and he’s a true professional.
Last week I attended the first in a series of legal-themed events sponsored by EDAC. I expected that the title “Patents and Patent Litigation: Develop, Strengthen, and Protect Your Intellectual Property” would draw well, and indeed the conference room at SEMI Global Headquarters in San Jose was packed. I won’t attempt to cover the wide range of topics addressed, but I would like to hit a few highlights from the panel discussion and the excellent questions from the moderator and the audience.
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Tags: Accellera, Breker, Cadence, EDA, EDAC, Liccardo, mentor, patents, San Jose, standards, Synopsys, Trek, TrekApp, TrekSoC, USPTO
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Monday, August 5th, 2013
Back in March I published an opinion piece in Chip Design magazine about redefining “DAC” from “Design Automation Conference” to “Development Automation Conference” and “EDA” from “Electronic Design Automation” to “Electronic Development Automation” to reflect reality. It generated a few comments and got a few people talking but that’s as far as it went.
I certainly didn’t expect a groundswell of support or an overnight change, but I was serious about my reasoning. I think that describing the incredibly complex development process for electronic products as “design” is outdated and not representative of the wide range of skills required.
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Tags: Breker, Cadence, CDNLive, dac, dvcon, EDA, EDAC, functional verification, SNUG, Synopsys
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