Portable Stimulus Takes Center Stage At DVCon 2017

When DVCon opens next week, attendees will hear plenty of talk about Portable Stimulus, a methodology and technology that’s grabbing industry attention and gaining momentum with the design verification community. In fact, I predict it will be the buzz of the conference this year.

Using a novel graph-based approach, Portable Stimulus is a standard means to specify verification intent and behaviors reusable across target platforms. Think of it as the GPS system for the verification flow –– Graph-based to ensure comprehensible complex scenarios, Portable, eliminating test redundancy across platforms, and Shareable to foster communication and reuse.

DVCon’s sponsor Accellera is backing Portable Stimulus and its Portable Stimulus Working Group, a dynamic mix of users and vendors, is in the process of standardizing it and helping grow its adoption. As a result, the DVCon program includes a few intriguing sessions on Portable Stimulus.

The first is an Accellera-sponsored tutorial titled, “Creating Portable Stimulus Models with the Upcoming Accellera Standard,” Monday from 9 a.m. until noon. It features speakers from Analog Devices, Cadence, Intel, Mentor, Synopsys, Vayavya Labs and Adnan Hamid, co-founder and CEO of Breker.

Adnan will lead a panel discussion “Users Talk Back on Portable Stimulus” Wednesday from 8:30 a.m. to 9:30 a.m. The panel will be an opportunity for users to share their perspectives on Portable Stimulus. Participants are from Analog Devices, Cavium, IBM, NVIDIA and Qualcomm. If you’re attending DVCon, please come and bring your questions.

Breker, along with 30 other chip design verification companies, EDACafe and the ESD Alliance, will exhibit at this year’s DVCon. We’ll showcase our TrekSoC portfolio of Portable Stimulus software in Booth #504. If you stop by, we can explain how scenario test generation can be used for all stages of the verification process using a single, comprehensible, executable verification specification. Our demonstrations will showcase TrekSoC’s ability to implement portable stimulus across complex projects, and serves as the verification GPS.

DVCon will be held Monday, February 27, through Thursday, March 2, at the DoubleTree Hotel in San Jose, Calif. Exhibits will be open for DVCon’s Booth Crawl Monday from 5 p.m. until 7 p.m., and Tuesday and Wednesday from 2:30 p.m. until 6 p.m.

One final not-to-be-missed DVCon event is “Ride With the Verify Seven –– The Next-Gen Verification Leaders on EDA, Technology and Making It in Today’s Environment.” Co-hosted by the ESD Alliance and OneSpin Solutions, it happens Monday evening at 7 p.m., after the DVCon Booth Crawl. Adnan will be one of six panelists in a discussion moderated by Jim Hogan of Vista Ventures. Drinks and snacks will be provided as the seven participants express their thoughts on making it as a small company in EDA, what’s coming in verification, and what can end-users expect in the future.

DVCon promises to be an exhilarating and possibly exhausting week. Looking back a few years from now, it may prove to be Portable Stimulus’ coming out event. We look forward to seeing you there.

Tags: ADI, Adnan Hamid, Breker Verification Systems, Cavium, DVCon 2017, EDACafe, ESD Alliance, IBM, Intel, Jim Hogan, NVIDIA, OneSpin Solutions, portable stimulus, Qualcomm, TrekSoC, Verification GPS, Vista Ventures

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