The Genesis of Portable Stimulus

When I first met Adnan Hamid, Breker’s CEO, his philosophical understanding of verification and its implications for electronics was as crystal clear then as it is now. He sees it as the enabler for greater innovation in chips and beyond, and takes it as his life’s mission. His passion was inspiring to me and I did not hesitate for a second when we decided to jointly start Breker. Throughout our journey, I have watched the market converge with what we are building at Breker, and have come to better appreciate my partner, the visionary man.

At the beginning, we talked about “graph-based verification” as the approach was core to our technology. Adnan thought graphs were how human beings approached complex problem solving, and from a non-technical point of view, I could see is true. In something as simple as planning for a large family gathering, a melting pot of conflicting personalities, I used a decision tree matrix and weighed certain relationships differently than others to arrive at the right mix of people. Similarly, for a large complex chip, essentially a matrix of complicated relationships between various intents, a decision tree or graph seemed a powerful way to capture those relationships.

Adnan had tremendous success with the graph-based methodology at AMD and, between jobs, devised a way to move it beyond the confines of a monolithic application.  When we talked about graph-based verification in Breker’s early years, it did not appear compelling to users. We refined the story toward the outcome: thousands of automated, directed tests generated in a fraction of the time normally required to hand-write them. The only input required was to capture the verification intent in the form of a graph. A number of early adopters saw value in this, and once they got their hands on the technology, loved the simplicity and power of the tool. Up until 2008, we focused on the graph-based approach as a way users could easily generate complex tests.

In 2008, helped by user inputs, Adnan had the epiphany that up-and-coming SoC architectures presented many more opportunities to redefine system-level verification.

He envisioned:

• Deep state issues not seen in simpler chips that would be hard to get coverage with existing methods
• Integration testing would cease to be sufficient after a certain point
• DV engineers speaking the same language across platforms could achieve efficiencies of magnitude not seen before in verification

The graph-based approach provided a powerful way to solve these problems, especially as designs moved to multicore architectures. By making C-programs the output of our tool, we could make it portable across different platforms from IP to subsystem for vertical reuse, and from simulation to post-silicon for horizontal reuse.

The tools encapsulated years worth of knowledge that had been built into the toolset to help users optimize the tests for their target platform, in addition to providing debug features and other nice runtime capabilities. By 2013, we launched TrekSoC and TrekSoC-Si that delivered on this promise of faster coverage closure and portability across platforms.

This was before “Portable Stimulus” came to be.

With this backdrop, imagine my joy as I see the market beginning to converge on Breker’s vision for how this new verification methodology can make the user much more efficient, agile and effective. For the longest time, Breker was the only company on the soap box preaching the virtues of a graph-based approach to test generation. We extolled the efficiency behind capturing verification intent once and using it everywhere (portability), and the value to shortening time to silicon realization for subsequent generations of products as test maintenance became easier.

By end 2014, Mentor Graphics had initiated the formation of a working group within Accellera to help standardize what we know today as Portable Stimulus Standard.  The effort was later joined by Breker, Cadence, Vayavya and others, and champions the graph-based approach. Once the requirements for the standard had been collected, Breker contributed a C/C++ Class Library approach to the standard. Driven by user demand, it was decided that the standard will incorporate this approach in addition to the Domain Specific Language approach proposed by Mentor and Cadence.

What started as a kernel of an idea in the mind of a young 20-something year old is now helping to shape an industry standard. Every time I think about it, I get teary about the path we have taken to get here. It’s a path that required a defiant sense of faith in the vision for a simple, yet powerful, verification methodology.

Why am I inspired to write this piece today? As co-founder, and Adnan’s wife, my roles at Breker have been diverse. My primary function has been in finance and operations, but my greatest love is to meet people through our various marketing and sales activities.

I am a keen observer of human potential. I find it a fascinating study to understand the human decision-making process. In this spirit, I have made more of an effort to join our sales visits and trade show appearances. The last of these was DVClub in San Jose where David Brownell of Analog Devices gave a talk on “Portable Stimulus: The Next Step in Verification Productivity.” He mentioned multiple times that “graphs” are the biggest change from what we can do today and the most exciting new construct in the Portable Stimulus standard, because it is capable of capturing both temporal and structural relationships. He added that he hoped Portable Stimulus would provide exponential growth to verification productivity.

To hear an end user say these words as someone who studied the problem over his 20-plus year career, was an amazing experience for me. I have often heard the Breker sales team share stories of how users fall in love with our approach, but it is not the same as hearing it myself. I am hopeful more DV engineers and managers begin to appreciate the value of portable stimulus.

As the first one on the market, we continue to add advanced features on top of our robust technology and deliver value to big name customers, including IBM, NVIDIA, Cavium, Altera (Intel). None  are strangers to the challenges of complex verification problems. Their trust in us has strengthened our mission to enable realization of a significant shift in verification productivity.

As the only non-engineer at Breker, I sit on a perch watching the market for Portable Stimulus evolve over the years, more from a human behavioral point of view than technological. My conclusion is that, for all the resistance from users who don’t want another way of thinking about their problems and don’t have time to evaluate another EDA tool, they cannot help themselves when a compelling new methodology comes their way.

Portable Stimulus is not a tool but a gadget. It makes their life easier. It frees up time to do more innovative things than the daily grind of the “plumbing” many functions in verification have been reduced to. It allows engineers with a growth mindset to envision a new world they couldn’t easily access before. To me, it is much like the smartphone.  It took the mobile phone from a utilitarian tool to a productivity tool and delivered a world the consumers could not possibly have imagined.  Look at where we are now.

Tags: Accellera, Altera, Analog Devices, C/C++ Class Library, Cavium, coverage closure, David Brownell, Deep state bugs, functional verification, graphs, IBM, Intel, NVIDIA, portability, portable stimuls, portable stimulus market leader, system level verification, TrekSoC, TrekSoC-Si, Verification Productivity

Category: Management

This entry was posted on Tuesday, October 25th, 2016 at 11:09 am. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.