Guest Post: DAC From a Different Perspective

We hope you enjoyed last week’s guest post from Jonah McLeod of Kilopass with his experiences at this year’s Design Automation Conference (DAC) in San Francisco. We’ve offered several of our friends in the EDA industry to write in with their assessments of the show. Next up is Lauro Rizzatti, another industry veteran perhaps best-known as general manager of EVE-USA. These days he’s a verification consultant, and he shares his story of going to DAC as a conference attendee rather than as a vendor:

This is the first DAC where I wasn’t responsible for an exhibitor booth and it was exhilarating. I was able to attend sessions, walk the exhibit floor and, generally, get a feel for what’s going on in our industry. I’m pleased to report the news is good. Very good, in fact.

While attending a few panels and talking to several exhibitors and attendees, I found that there is a consensus on the long life ahead for the 28nm node technology. While the FinFET approach at 20nm and below will be adopted for very large SoC designs, such as processors and graphics, 28nm will dominate the semiconductor design landscape for a long time to come. That’s because of its cheap cost and widespread support.

In other words, there will be a discontinuity –– is this the end of Moore’s Law? –– in the historical trend that new and smaller node technologies displaced the older larger ones. This may shift the EDA focus from back-end tools to front-end design and verification, in the hopes of getting more performance and functionality from existing technologies. I’m pleased to say that I had the chance at DAC to discover several interesting small EDA companies, a good sign for the health of the industry.

First up is Breker Verification Systems. Since you’re reading this blog, you already know Breker is one of the most innovative EDA companies in the front end. I understand its SoC Verification software enables more thorough verification and more confidence in the design by eliminating the need to hand-write tests for an SoC’s embedded processors. Congratulations to Adnan Hamid!

I had the pleasure of visiting the booths of two startups in my field of expertise, emulation and FPGA prototyping. The first was Flexras, a company from Saint-Denis, France, that made design partitioning for emulation and FPGA prototyping its scope. A not-so-well-kept secret is that the ZeBu emulator, formerly from EVE, today Synopsys, embeds an early version of its partitioner in the compilation flow. Over time, Flexras enhanced its tool with new features, and added RTL to the original gate-level partitioning.

The experience Flexras gained when mapping very large designs on many FPGAs supporting EVE’s emulator gives the company an edge over its competition. Some FPGA prototyping vendors I spoke to confirmed that the Flexras partitioner is a first-rate tool.

The recent announcement by Synopsys that its ProtoCompiler will be focused on its HAPS prototyping offering opens the door to Flexras to the broad market as a replacement for the Synopsys’ Certify partitioner. Rumor is, Flexras is expecting a large order from a Tier 1 semiconductor company. Hats off to Hyder and C!

The second startup was S2C, an FPGA prototyping company based in San Jose, Calif., with R&D in China. I spoke to Mon-Ren Chene, one of the founders whom I have known for many years. He was brimming with joy for a recent multimillion dollar order from a major U.S. semiconductor company. It is always a pleasure to learn of a success of a startup in the highly competitive EDA environment. Well done, Mon-Ren!

I also spoke to Dr. Raik Brinkmann, co-founder and CEO of OneSpin Solutions from Munich, Germany. Since my EVE days when we met regularly with OneSpin, Dr. Brinkman tripled bookings and is a firm believer in the technical superiority of their formal technology, openly boasting about its virtues. The recent acquisition of Jasper by Cadence may open the market to a potentially broader customer base for OneSpin. No surprise he is excited. Good job, Raik!

Then there’s Uniquify, a company to keep an eye on. Bob Smith, its senior vice president of marketing and business development, Gabe Iniguez, marketing communications specialist, and I recently created a series of mini-webinars on its DDR memory subsystem IP found at the Uniquify website. I learned that DAC gave Uniquify a collection of promising prospects for its unique DDR IP. Way to go, Bob and Gabe!

DAC may be just a memory to some attendees. To me, it reinforced my belief that emulation is coming into its own and the challenges associated with chip design are never ending. That should provide entrepreneurs with plenty of product ideas and solutions for years to come.

Lauro Rizzatti is a verification consultant. He was formerly general manager of EVE-USA and its vice president of marketing before Synopsys’ acquisition of EVE. Previously, he held positions in management, product marketing, technical marketing, and engineering. He can be reached at lauro@rizzatti.com.

Tags: 28nm, Breker, dac, emulation, eve, Flexras, FPGA prototyping, functional verification, Moore's Law, OneSpin, S2C, SoC verification, uniquify

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