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 The Breker Trekker

Archive for October 8th, 2013

TrekSoC: Achieving the Longstanding Goal of Vertical Verification Reuse

Tuesday, October 8th, 2013

One of the curious aspects of electronics is that most products are specified from the top down but implemented and verified from the bottom up. This is true for system-on-chip (SoC) development as well. As the onset, someone in product marketing specifies a chip that has a specific collection of functionality to meet a specific customer need. The architecture team develops a block diagram that defines the subsystems and perhaps some individual IP blocks as well.

When it comes time to develop the RTL that implements the SoC, designers tend to work from  the IP blocks upward. They select commercial IP where it makes sense and develop unique IP when needed. Designers are usually responsible for verifying their own blocks, perhaps with some assistance from verification engineers. There is usually minimal verification of commercial IP unless it has been customized for the SoC project.

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