Archive for July, 2013
Monday, July 29th, 2013
The recent guest post from OneSpin looking back at the Design Automation Conference (DAC) in Austin was very popular, so we’ve invited some more of our friends from the EDA community to share their experiences. This week we hear from Lianfeng Yang, Vice President of Marketing at ProPlus Design Solutions, Inc.:
This year’s DAC proved to be a journey from Nano-scale SPICE modeling to Giga-scale SPICE simulations and a place where attendees could learn the secrets of design for yield (DFY) during a Wednesday afternoon pavilion panel.
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Tags: Breker, BSIMPro, BSIMProPlus, dac, DFY, EDA, functional verification, ProPlus
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Tuesday, July 23rd, 2013
Folks who have been following Breker for a while know that we like the phrase “begin with the end in mind.” It succinctly summarizes why our use of graph-based scenario models is different than traditional constrained-random testbenches.
Suppose that you want to trigger a particular behavior within your design as part of your verification process. With a testbench, you have control over only the design’s inputs, so you might issue a series of input stimulus changes that you believe will cause the desired behavior. You may hit your target, or you may not. Automating your testbench with the constrained-random capabilities of the Universal Verification Methodology (UVM) reduces the manual effort, but there’s still no guarantee that you will trigger your targeted behavior.
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Tags: Breker, constrained-random, EDA, functional verification, graph, scenario model, test generation, TrekSoC, uvm
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Tuesday, July 16th, 2013
As you may have noticed, we call Breker “The SoC Verification Company” because we truly believe that we are defining a new category of EDA tools for SoC verification that has not been adequately addressed by other approaches. In the spirit of an engineer defining his or her terms before use, and with a nod to the long-running TV game show Jeopardy, let’s discuss what defines SoC verification and why it is different from verification of IP blocks and other types of chips.
Let’s start one clue higher on the Jeopardy board, with “SoC” for $400. What exactly is a system on chip (SoC)? Some would argue that any large, complex chip qualifies. We beg to differ. Should a pure processor, no matter how powerful, be called an SoC? Alternatively, should a giant network crossbar switch with no central processor be considered an SoC? The Breker viewpoint says that neither qualifies. We believe that an SoC contains at least one reasonably powerful embedded processor (8-bit MCUs don’t count) and multiple IP blocks interconnected by some sort of bus or fabric.
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Tags: Breker, EDA, functional verification, integration verification, jeopordy, SoC, SoC verification, TrekSoC
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Tuesday, July 9th, 2013
As you have read, Breker had an excellent Design Automation Conference (DAC) this year. Many other EDA vendors were pleased as well. Today, guest blogger Dr. Raik Brinkmann from OneSpin Solutions shares his experience:
After sitting out DAC last year, OneSpin Solutions was back, exhibiting and demonstrating our innovative formal assertion-based verification and formal equivalence checking solutions. Overall, we considered the 50th DAC to be a great success. From what we heard, we weren’t alone in our assessment. The exhibit floor was busy all three days and the technical sessions hopping. In general, most of the exhibitors were happy with attendance and thought DAC was worthwhile. No one knew what to expect, given the Austin location and the general health of the economy and EDA industry.
We’re pleased with the number of leads we collected from DAC and attribute much of it to our pre-DAC marketing and public relations campaign. We started upping our visibility around November last year and went into high gear at DVCon earlier this year. I highly recommend this strategy to all DAC exhibitors for next year.
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Tags: cloud, dac, EDA, equivalence checking, functional verification, integration verification, OneSpin
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Tuesday, July 2nd, 2013
A year or two ago, cloud computing was a hot topic at EDA events and conferences. The industry’s largest player, Synopsys, talked a lot about running their EDA tools in the cloud and claimed a great deal of customer interest in this area. Earlier this year, CEO Aart de Geus was quoted as saying that “Synopsys had made $0 on it.” What happened? Is the idea of EDA in the cloud dead? What are the issues preventing its adoption?
In talking to customers and reading related articles, I’ve heard of several reasons why the cloud is not yet a factor for EDA. One practical issue is that EDA vendors are not sure how to price cloud-based licenses. If the customer motivation to move to the cloud is to more easily handle infrequently used tools or to provide peak capacity for frequently used tools, indeed the wrong pricing model could cost the vendor money. One technical issue is that some EDA tools are interactive and would be painful to use over the Internet.
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Tags: Breker, Cadence, cloud computing, EDA, functional verification, SoC verification
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