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 Decoding Formal

Posts Tagged ‘#51DAC’

Formal Training in High Demand

Thursday, June 19th, 2014

This year at DAC, a question asked repeatedly got our attention: Do you offer advanced formal training program?

While we are not surprised by the request itself, the number, size, type and location of companies that asked about this was surprising. It included a wide spectrum of companies, from the U.S., Japan, Korea, China, along with large companies with established formal teams as well as small start-ups with no formal experience. Even EDA vendors asked if we could do training for them. (more…)

How Long Does It Take to Formally Verify This Design?

Friday, June 13th, 2014

This year at DAC, we asked attendees to participate in a guessing game – make an educated guess about how long it takes to formally verify a design based on the given design description and statistics.

Oski Guessing Game DAC 2014

How Long Does it Take to Formally Verify This Design?

Here is a recap of the information provided to participants:

Design Description

Reorder IP packets that can arrive out of order and dequeue them in order; when an exception occurs, the design flushes the IP packets for which exceptions has occurred. Support 36 different inputs that can send the data for one or more ports. Another interface provides dequeue requests for different ports. Design supports 48 different ports.

Design Interface

Packets arrive with valid signal; a request/grant mechanism for handling requests from 36 different sources; All 36 inputs are independent and can arrive concurrently; All 48 ports can be dequeued in parallel using another request/grant mechanism.

Design Micro-architecture Details

Supports enqueue and dequeue for IP packets for 362 different input and 48 different ports respectively; 48 different queues used to store IP packets for different ports; A round robin arbiter resolves contention between enqueue requests from different sources for the same port at the same cycle. (more…)

Cooley’s Report: Only Half The Story?

Friday, May 23rd, 2014

Every year John Cooley publishes a DAC “must-see” list – a veritable treasure map of good stories. While this list has served DAC attendees in the past, in recent years it has continued to miss an important segment of the ecosystem: the growing number of service providers.

Oski Technology is one such service provider. In fact Oski is the only service provider in the formal verification space, and plays an important role in promoting formal adoption in the industry. Formal can improve verification efficiency and productivity, lead to reduced project cost and shorten time-to-market. Since 2005 we have partnered with many leading semiconductor companies to tape out mission-critical designs and build up their internal formal expertise. (more…)

Win:1-Week Formal Test Planning Session with Oski Technology

Thursday, May 8th, 2014

Enter to Win: 1-Week Formal Test Planning Session with Oski Technology

Formal test planning is the first step to ensuring successful End-to-End formal verification and formal sign-off.

There are 3 stages in the process of formal test planning – identifying the right design blocks for formal verification (the where question); estimating the formal verification effort using key metrics (the how much question); and planning the specific formal verification tasks on the chosen designs (the what question).

A good planning session can take several weeks to analyze the design, understand formal complexity hotspots, estimate the effort and craft a workable blueprint for formal verification. However we often see engineers jumping into the act of formal verification without spending enough time in formal test planning. Without proper formal test planning, it is not possible to achieve formal sign-off. (more…)




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